Change some explicit type checks into using helper functions.

src/IceInstX8632.cpp

 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the InstX8632 and OperandX8632 classes,
@@ skipping 496 matching lines @@
                        const Operand *Src,
                        const x86::AssemblerX86::GPREmitterRegOp &Emitter) {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   assert(Var->hasReg());
   // We cheat a little and use GPRRegister even for byte operations.
   RegX8632::GPRRegister VarReg =
       RegX8632::getEncodedByteRegOrGPR(Ty, Var->getRegNum());
   if (const Variable *SrcVar = llvm::dyn_cast<Variable>(Src)) {
     if (SrcVar->hasReg()) {
-      RegX8632::GPRRegister SrcReg;
-      if (Ty == IceType_i8 || Ty == IceType_i1) {
-        SrcReg = static_cast<RegX8632::GPRRegister>(
-            RegX8632::getEncodedByteReg(SrcVar->getRegNum()));
-      } else {
-        SrcReg = RegX8632::getEncodedGPR(SrcVar->getRegNum());
-      }
+      RegX8632::GPRRegister SrcReg =
+          RegX8632::getEncodedByteRegOrGPR(Ty, SrcVar->getRegNum());
       (Asm->*(Emitter.GPRGPR))(Ty, VarReg, SrcReg);
     } else {
       x86::Address SrcStackAddr = static_cast<TargetX8632 *>(Func->getTarget())
                                       ->stackVarToAsmOperand(SrcVar);
       (Asm->*(Emitter.GPRAddr))(Ty, VarReg, SrcStackAddr);
     }
   } else if (const OperandX8632Mem *Mem =
                  llvm::dyn_cast<OperandX8632Mem>(Src)) {
     x86::Address SrcAddr = Mem->toAsmAddress(Asm);
     (Asm->*(Emitter.GPRAddr))(Ty, VarReg, SrcAddr);
@@ skipping 206 matching lines @@
 const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Subss::Emitter = {
     &x86::AssemblerX86::subss, &x86::AssemblerX86::subss, NULL};
 template <>
 const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Subps::Emitter = {
     &x86::AssemblerX86::subps, &x86::AssemblerX86::subps, NULL};
 
 template <> void InstX8632Sqrtss::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Type Ty = getSrc(0)->getType();
-  assert(Ty == IceType_f32 || Ty == IceType_f64);
+  assert(isScalarFloatingType(Ty));
   Str << "\tsqrt" << TypeX8632Attributes[Ty].SdSsString << "\t";
   getDest()->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
   Str << "\n";
 }
 
 template <> void InstX8632Addss::emit(const Cfg *Func) const {
   char buf[30];
   snprintf(buf, llvm::array_lengthof(buf), "add%s",
@@ skipping 120 matching lines @@
 
 template <> void InstX8632Pblendvb::emit(const Cfg *Func) const {
   assert(static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
          TargetX8632::SSE4_1);
   emitVariableBlendInst(Opcode, this, Func);
 }
 
 template <> void InstX8632Imul::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
-  if (getDest()->getType() == IceType_i8) {
+  if (isByteSizedArithType(getDest()->getType())) {
     // The 8-bit version of imul only allows the form "imul r/m8".
     Variable *Src0 = llvm::dyn_cast<Variable>(getSrc(0));
     (void)Src0;
     assert(Src0 && Src0->getRegNum() == RegX8632::Reg_eax);
     Str << "\timul\t";
     getSrc(1)->emit(Func);
     Str << "\n";
   } else if (llvm::isa<Constant>(getSrc(1))) {
     Str << "\timul\t";
     getDest()->emit(Func);
@@ skipping 834 matching lines @@
 void InstX8632AdjustStack::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "esp = sub.i32 esp, " << Amount;
 }
 
 void InstX8632Push::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Type Ty = getSrc(0)->getType();
   Variable *Var = llvm::dyn_cast<Variable>(getSrc(0));
-  if ((isVectorType(Ty) || Ty == IceType_f32 || Ty == IceType_f64) && Var &&
-      Var->hasReg()) {
+  if ((isVectorType(Ty) || isScalarFloatingType(Ty)) && Var && Var->hasReg()) {
     // The xmm registers can't be directly pushed, so we fake it by
     // decrementing esp and then storing to [esp].
     Str << "\tsub\tesp, " << typeWidthInBytes(Ty) << "\n";
     if (!SuppressStackAdjustment)
       Func->getTarget()->updateStackAdjustment(typeWidthInBytes(Ty));
     if (isVectorType(Ty)) {
       Str << "\tmovups\txmmword ptr [esp], ";
     } else {
       Str << "\tmov" << TypeX8632Attributes[Ty].SdSsString << "\t"
           << TypeX8632Attributes[Ty].WidthString << " [esp], ";
@@ skipping 300 matching lines @@
   }
   Str << "(";
   if (Func)
     Var->dump(Func);
   else
     Var->dump(Str);
   Str << ")";
 }
 
 } // end of namespace Ice