Add support for the QNX operating system.

src/atomicops_internals_arm_gcc.h

 // Copyright 2010 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 14 matching lines @@
 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 // This file is an internal atomic implementation, use atomicops.h instead.
 //
 // LinuxKernelCmpxchg and Barrier_AtomicIncrement are from Google Gears.
 
 #ifndef V8_ATOMICOPS_INTERNALS_ARM_GCC_H_
 #define V8_ATOMICOPS_INTERNALS_ARM_GCC_H_
 
+#if V8_OS_QNX

[Benedikt Meurer, 2013/11/15 11:49:59]

The atomicops_*.h files were copied from Chromium's base/atomicops_*.h. If
possible we'd like to avoid adding our own changes here. Do you plan on porting
Chromium to QNX as well?

[c.truta, 2013/11/18 13:36:32]

Yes. We can keep this change for now in our private branches, until we land it
in Chromium, and then resubmit here, if you prefer.

[Benedikt Meurer, 2013/11/19 07:01:27]

That's great! I think we'll just sync all atomicops_* files again, once your
changes have landed.

+#include <arm/cpuinline.h>
+#include <arm/smpxchg.h>
+#endif
+
 namespace v8 {
 namespace internal {
 
+#if V8_OS_QNX
+inline void MemoryBarrier() {
+  __cpu_membarrier();
+}
+
+inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr,
+                                         Atomic32 old_value,
+                                         Atomic32 new_value) {
+  return _smp_cmpxchg(reinterpret_cast<volatile unsigned*>(ptr),
+                      old_value, new_value);
+}
+
+inline Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr,
+                                         Atomic32 new_value) {
+  return _smp_xchg(reinterpret_cast<volatile unsigned*>(ptr), new_value);
+}
+
+inline Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr,
+                                          Atomic32 increment) {
+  return Barrier_AtomicIncrement(ptr, increment);
+}
+
+inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr,
+                                        Atomic32 increment) {
+  for (;;) {
+    // Atomic exchange the old value with an incremented one.
+    Atomic32 old_value = *ptr;
+    Atomic32 new_value = old_value + increment;
+    if (_smp_cmpxchg(reinterpret_cast<volatile unsigned*>(ptr),
+                     old_value, new_value) ==
+        static_cast<unsigned>(old_value)) {
+      // The exchange took place as expected.
+      return new_value;
+    }
+    // Otherwise, *ptr changed mid-loop and we need to retry.
+  }
+}
+#else
 // 0xffff0fc0 is the hard coded address of a function provided by
 // the kernel which implements an atomic compare-exchange. On older
 // ARM architecture revisions (pre-v6) this may be implemented using
 // a syscall. This address is stable, and in active use (hard coded)
 // by at least glibc-2.7 and the Android C library.
 typedef Atomic32 (*LinuxKernelCmpxchgFunc)(Atomic32 old_value,
                                            Atomic32 new_value,
                                            volatile Atomic32* ptr);
 LinuxKernelCmpxchgFunc pLinuxKernelCmpxchg __attribute__((weak)) =
     (LinuxKernelCmpxchgFunc) 0xffff0fc0;
 
 typedef void (*LinuxKernelMemoryBarrierFunc)(void);
 LinuxKernelMemoryBarrierFunc pLinuxKernelMemoryBarrier __attribute__((weak)) =
     (LinuxKernelMemoryBarrierFunc) 0xffff0fa0;
 
+inline void MemoryBarrier() {
+  pLinuxKernelMemoryBarrier();
+}
 
 inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr,
                                          Atomic32 old_value,
                                          Atomic32 new_value) {
   Atomic32 prev_value = *ptr;
   do {
     if (!pLinuxKernelCmpxchg(old_value, new_value,
                              const_cast<Atomic32*>(ptr))) {
       return old_value;
     }
@@ skipping 24 matching lines @@
     Atomic32 old_value = *ptr;
     Atomic32 new_value = old_value + increment;
     if (pLinuxKernelCmpxchg(old_value, new_value,
                             const_cast<Atomic32*>(ptr)) == 0) {
       // The exchange took place as expected.
       return new_value;
     }
     // Otherwise, *ptr changed mid-loop and we need to retry.
   }
 }
+#endif  // V8_OS_QNX
 
 inline Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr,
                                        Atomic32 old_value,
                                        Atomic32 new_value) {
   return NoBarrier_CompareAndSwap(ptr, old_value, new_value);
 }
 
 inline Atomic32 Release_CompareAndSwap(volatile Atomic32* ptr,
                                        Atomic32 old_value,
                                        Atomic32 new_value) {
   return NoBarrier_CompareAndSwap(ptr, old_value, new_value);
 }
 
 inline void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value) {
   *ptr = value;
 }
 
-inline void MemoryBarrier() {
-  pLinuxKernelMemoryBarrier();
-}
-
 inline void Acquire_Store(volatile Atomic32* ptr, Atomic32 value) {
   *ptr = value;
   MemoryBarrier();
 }
 
 inline void Release_Store(volatile Atomic32* ptr, Atomic32 value) {
   MemoryBarrier();
   *ptr = value;
 }
 
 inline Atomic32 NoBarrier_Load(volatile const Atomic32* ptr) {
   return *ptr;
 }
 
 inline Atomic32 Acquire_Load(volatile const Atomic32* ptr) {
   Atomic32 value = *ptr;
   MemoryBarrier();
   return value;
 }
 
 inline Atomic32 Release_Load(volatile const Atomic32* ptr) {
   MemoryBarrier();
   return *ptr;
 }
 
 } }  // namespace v8::internal
 
 #endif  // V8_ATOMICOPS_INTERNALS_ARM_GCC_H_