Subzero: Fix emission of 16-bit immediates.

src/assembler_ia32.cpp

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // Modified by the Subzero authors.
 //
 //===- subzero/src/assembler_ia32.cpp - Assembler for x86-32  -------------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the Assembler class for x86-32.
 //
 //===----------------------------------------------------------------------===//
 
 #include "assembler_ia32.h"
 #include "IceCfg.h"
 #include "IceMemoryRegion.h"
 #include "IceOperand.h"
 
 namespace Ice {
 namespace x86 {
 
+const Type BrokenType = IceType_i32;
+
 class DirectCallRelocation : public AssemblerFixup {
 public:
   static DirectCallRelocation *create(Assembler *Asm, FixupKind Kind,
                                       const ConstantRelocatable *Sym) {
     return new (Asm->Allocate<DirectCallRelocation>())
         DirectCallRelocation(Kind, Sym);
   }
 
   void Process(const MemoryRegion &region, intptr_t position) {
     // Direct calls are relative to the following instruction on x86.
@@ skipping 60 matching lines @@
 
 void AssemblerX86::pushl(const Address &address) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0xFF);
   EmitOperand(6, address);
 }
 
 void AssemblerX86::pushl(const Immediate &imm) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x68);
-  EmitImmediate(imm);
+  EmitImmediate(BrokenType, imm);
 }
 
 void AssemblerX86::popl(GPRRegister reg) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x58 + reg);
 }
 
 void AssemblerX86::popl(const Address &address) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x8F);
@@ skipping 13 matching lines @@
 void AssemblerX86::setcc(CondX86::BrCond condition, ByteRegister dst) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x0F);
   EmitUint8(0x90 + condition);
   EmitUint8(0xC0 + dst);
 }
 
 void AssemblerX86::movl(GPRRegister dst, const Immediate &imm) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0xB8 + dst);
-  EmitImmediate(imm);
+  EmitImmediate(BrokenType, imm);
 }
 
 void AssemblerX86::movl(GPRRegister dst, GPRRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x89);
   EmitRegisterOperand(src, dst);
 }
 
 void AssemblerX86::movl(GPRRegister dst, const Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x8B);
   EmitOperand(dst, src);
 }
 
 void AssemblerX86::movl(const Address &dst, GPRRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x89);
   EmitOperand(src, dst);
 }
 
 void AssemblerX86::movl(const Address &dst, const Immediate &imm) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0xC7);
   EmitOperand(0, dst);
-  EmitImmediate(imm);
+  EmitImmediate(BrokenType, imm);
 }
 
 void AssemblerX86::movzxb(GPRRegister dst, ByteRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x0F);
   EmitUint8(0xB6);
   EmitRegisterOperand(dst, src);
 }
 
 void AssemblerX86::movzxb(GPRRegister dst, const Address &src) {
@@ skipping 946 matching lines @@
 }
 
 void AssemblerX86::fincstp() {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0xD9);
   EmitUint8(0xF7);
 }
 
 void AssemblerX86::cmpl(GPRRegister reg, const Immediate &imm) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitComplex(7, Operand(reg), imm);
+  EmitComplex(BrokenType, 7, Operand(reg), imm);
 }
 
 void AssemblerX86::cmpl(GPRRegister reg0, GPRRegister reg1) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x3B);
   EmitOperand(reg0, Operand(reg1));
 }
 
 void AssemblerX86::cmpl(GPRRegister reg, const Address &address) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x3B);
   EmitOperand(reg, address);
 }
 
 void AssemblerX86::cmpl(const Address &address, GPRRegister reg) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x39);
   EmitOperand(reg, address);
 }
 
 void AssemblerX86::cmpl(const Address &address, const Immediate &imm) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitComplex(7, address, imm);
+  EmitComplex(BrokenType, 7, address, imm);
 }
 
 void AssemblerX86::cmpb(const Address &address, const Immediate &imm) {
   assert(imm.is_int8());
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x80);
   EmitOperand(7, address);
   EmitUint8(imm.value() & 0xFF);
 }
 
@@ skipping 12 matching lines @@
     if (reg == RegX8632::Encoded_Reg_eax) {
       EmitUint8(0xA8);
     } else {
       EmitUint8(0xF6);
       EmitUint8(0xC0 + reg);
     }
     EmitUint8(immediate.value() & 0xFF);
   } else if (reg == RegX8632::Encoded_Reg_eax) {
     // Use short form if the destination is EAX.
     EmitUint8(0xA9);
-    EmitImmediate(immediate);
+    EmitImmediate(BrokenType, immediate);
   } else {
     EmitUint8(0xF7);
     EmitOperand(0, Operand(reg));
-    EmitImmediate(immediate);
+    EmitImmediate(BrokenType, immediate);
   }
 }
 
 void AssemblerX86::And(Type Ty, GPRRegister dst, GPRRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   if (Ty == IceType_i16)
     EmitOperandSizeOverride();
   if (Ty == IceType_i8 || Ty == IceType_i1)
     EmitUint8(0x22);
   else
@@ skipping 13 matching lines @@
 }
 
 void AssemblerX86::And(Type Ty, GPRRegister dst, const Immediate &imm) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   if (Ty == IceType_i8 || Ty == IceType_i1) {
     EmitComplexI8(4, Operand(dst), imm);
     return;
   }
   if (Ty == IceType_i16)
     EmitOperandSizeOverride();
-  EmitComplex(4, Operand(dst), imm);
+  EmitComplex(Ty, 4, Operand(dst), imm);
 }
 
 void AssemblerX86::Or(Type Ty, GPRRegister dst, GPRRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   if (Ty == IceType_i16)
     EmitOperandSizeOverride();
   if (Ty == IceType_i8 || Ty == IceType_i1)
     EmitUint8(0x0A);
   else
     EmitUint8(0x0B);
@@ skipping 12 matching lines @@
 }
 
 void AssemblerX86::Or(Type Ty, GPRRegister dst, const Immediate &imm) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   if (Ty == IceType_i8 || Ty == IceType_i1) {
     EmitComplexI8(1, Operand(dst), imm);
     return;
   }
   if (Ty == IceType_i16)
     EmitOperandSizeOverride();
-  EmitComplex(1, Operand(dst), imm);
+  EmitComplex(Ty, 1, Operand(dst), imm);
 }
 
 void AssemblerX86::Xor(Type Ty, GPRRegister dst, GPRRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   if (Ty == IceType_i16)
     EmitOperandSizeOverride();
   if (Ty == IceType_i8 || Ty == IceType_i1)
     EmitUint8(0x32);
   else
     EmitUint8(0x33);
@@ skipping 12 matching lines @@
 }
 
 void AssemblerX86::Xor(Type Ty, GPRRegister dst, const Immediate &imm) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   if (Ty == IceType_i8 || Ty == IceType_i1) {
     EmitComplexI8(6, Operand(dst), imm);
     return;
   }
   if (Ty == IceType_i16)
     EmitOperandSizeOverride();
-  EmitComplex(6, Operand(dst), imm);
+  EmitComplex(Ty, 6, Operand(dst), imm);
 }
 
 void AssemblerX86::add(Type Ty, GPRRegister dst, GPRRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   if (Ty == IceType_i16)
     EmitOperandSizeOverride();
   if (Ty == IceType_i8 || Ty == IceType_i1)
     EmitUint8(0x02);
   else
     EmitUint8(0x03);
@@ skipping 12 matching lines @@
 }
 
 void AssemblerX86::add(Type Ty, GPRRegister reg, const Immediate &imm) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   if (Ty == IceType_i8 || Ty == IceType_i1) {
     EmitComplexI8(0, Operand(reg), imm);
     return;
   }
   if (Ty == IceType_i16)
     EmitOperandSizeOverride();
-  EmitComplex(0, Operand(reg), imm);
+  EmitComplex(Ty, 0, Operand(reg), imm);
 }
 
 void AssemblerX86::adc(Type Ty, GPRRegister dst, GPRRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   if (Ty == IceType_i16)
     EmitOperandSizeOverride();
   if (Ty == IceType_i8 || Ty == IceType_i1)
     EmitUint8(0x12);
   else
     EmitUint8(0x13);
@@ skipping 12 matching lines @@
 }
 
 void AssemblerX86::adc(Type Ty, GPRRegister reg, const Immediate &imm) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   if (Ty == IceType_i8 || Ty == IceType_i1) {
     EmitComplexI8(2, Operand(reg), imm);
     return;
   }
   if (Ty == IceType_i16)
     EmitOperandSizeOverride();
-  EmitComplex(2, Operand(reg), imm);
+  EmitComplex(Ty, 2, Operand(reg), imm);
 }
 
 void AssemblerX86::sub(Type Ty, GPRRegister dst, GPRRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   if (Ty == IceType_i16)
     EmitOperandSizeOverride();
   if (Ty == IceType_i8 || Ty == IceType_i1)
     EmitUint8(0x2A);
   else
     EmitUint8(0x2B);
@@ skipping 12 matching lines @@
 }
 
 void AssemblerX86::sub(Type Ty, GPRRegister reg, const Immediate &imm) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   if (Ty == IceType_i8 || Ty == IceType_i1) {
     EmitComplexI8(5, Operand(reg), imm);
     return;
   }
   if (Ty == IceType_i16)
     EmitOperandSizeOverride();
-  EmitComplex(5, Operand(reg), imm);
+  EmitComplex(Ty, 5, Operand(reg), imm);
 }
 
 void AssemblerX86::sbb(Type Ty, GPRRegister dst, GPRRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   if (Ty == IceType_i16)
     EmitOperandSizeOverride();
   if (Ty == IceType_i8 || Ty == IceType_i1)
     EmitUint8(0x1A);
   else
     EmitUint8(0x1B);
@@ skipping 12 matching lines @@
 }
 
 void AssemblerX86::sbb(Type Ty, GPRRegister reg, const Immediate &imm) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   if (Ty == IceType_i8 || Ty == IceType_i1) {
     EmitComplexI8(3, Operand(reg), imm);
     return;
   }
   if (Ty == IceType_i16)
     EmitOperandSizeOverride();
-  EmitComplex(3, Operand(reg), imm);
+  EmitComplex(Ty, 3, Operand(reg), imm);
 }
 
 void AssemblerX86::cbw() {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitOperandSizeOverride();
   EmitUint8(0x98);
 }
 
 void AssemblerX86::cwd() {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
@@ skipping 54 matching lines @@
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x0F);
   EmitUint8(0xAF);
   EmitOperand(dst, Operand(src));
 }
 
 void AssemblerX86::imull(GPRRegister reg, const Immediate &imm) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x69);
   EmitOperand(reg, Operand(reg));
-  EmitImmediate(imm);
+  EmitImmediate(BrokenType, imm);
 }
 
 void AssemblerX86::imull(GPRRegister reg, const Address &address) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x0F);
   EmitUint8(0xAF);
   EmitOperand(reg, address);
 }
 
 void AssemblerX86::imull(GPRRegister reg) {
@@ skipping 468 matching lines @@
   EmitUint8(operand.encoding_[0] + (rm << 3));
   if (operand.fixup()) {
     EmitFixup(operand.fixup());
   }
   // Emit the rest of the encoded operand.
   for (intptr_t i = 1; i < length; i++) {
     EmitUint8(operand.encoding_[i]);
   }
 }
 
-void AssemblerX86::EmitImmediate(const Immediate &imm) {
-  EmitInt32(imm.value());
+void AssemblerX86::EmitImmediate(Type Ty, const Immediate &imm) {
+  if (Ty == IceType_i16)
+    EmitInt16(imm.value());
+  else
+    EmitInt32(imm.value());
 }
 
 void AssemblerX86::EmitComplexI8(int rm, const Operand &operand,
                                  const Immediate &immediate) {
   assert(rm >= 0 && rm < 8);
   assert(immediate.is_int8());
   if (operand.IsRegister(RegX8632::Encoded_Reg_eax)) {
     // Use short form if the destination is al.
     EmitUint8(0x04 + (rm << 3));
     EmitUint8(immediate.value() & 0xFF);
   } else {
     // Use sign-extended 8-bit immediate.
     EmitUint8(0x80);
     EmitOperand(rm, operand);
     EmitUint8(immediate.value() & 0xFF);
   }
 }
 
-void AssemblerX86::EmitComplex(int rm, const Operand &operand,
+void AssemblerX86::EmitComplex(Type Ty, int rm, const Operand &operand,
                                const Immediate &immediate) {
   assert(rm >= 0 && rm < 8);
   if (immediate.is_int8()) {
     // Use sign-extended 8-bit immediate.
     EmitUint8(0x83);
     EmitOperand(rm, operand);
     EmitUint8(immediate.value() & 0xFF);
   } else if (operand.IsRegister(RegX8632::Encoded_Reg_eax)) {
     // Use short form if the destination is eax.
     EmitUint8(0x05 + (rm << 3));
-    EmitImmediate(immediate);
+    EmitImmediate(Ty, immediate);
   } else {
     EmitUint8(0x81);
     EmitOperand(rm, operand);
-    EmitImmediate(immediate);
+    EmitImmediate(Ty, immediate);
   }
 }
 
 void AssemblerX86::EmitLabel(Label *label, intptr_t instruction_size) {
   if (label->IsBound()) {
     intptr_t offset = label->Position() - buffer_.Size();
     assert(offset <= 0);
     EmitInt32(offset - instruction_size);
   } else {
     EmitLabelLink(label);
@@ skipping 31 matching lines @@
 void AssemblerX86::EmitGenericShift(int rm, const Operand &operand,
                                     GPRRegister shifter) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   assert(shifter == RegX8632::Encoded_Reg_ecx);
   EmitUint8(0xD3);
   EmitOperand(rm, Operand(operand));
 }
 
 } // end of namespace x86
 } // end of namespace Ice