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Issue 605693003: [turbofan] ARM64 support for multiply-accumulate (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 2 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 6
7 #include "src/arm64/macro-assembler-arm64.h" 7 #include "src/arm64/macro-assembler-arm64.h"
8 #include "src/compiler/code-generator-impl.h" 8 #include "src/compiler/code-generator-impl.h"
9 #include "src/compiler/gap-resolver.h" 9 #include "src/compiler/gap-resolver.h"
10 #include "src/compiler/node-matchers.h" 10 #include "src/compiler/node-matchers.h"
(...skipping 186 matching lines...) Expand 10 before | Expand all | Expand 10 after
197 break; 197 break;
198 case kArm64Bic32: 198 case kArm64Bic32:
199 __ Bic(i.OutputRegister32(), i.InputRegister32(0), i.InputOperand32(1)); 199 __ Bic(i.OutputRegister32(), i.InputRegister32(0), i.InputOperand32(1));
200 break; 200 break;
201 case kArm64Mul: 201 case kArm64Mul:
202 __ Mul(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); 202 __ Mul(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
203 break; 203 break;
204 case kArm64Mul32: 204 case kArm64Mul32:
205 __ Mul(i.OutputRegister32(), i.InputRegister32(0), i.InputRegister32(1)); 205 __ Mul(i.OutputRegister32(), i.InputRegister32(0), i.InputRegister32(1));
206 break; 206 break;
207 case kArm64Madd:
208 __ Madd(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1),
209 i.InputRegister(2));
210 break;
211 case kArm64Madd32:
212 __ Madd(i.OutputRegister32(), i.InputRegister32(0), i.InputRegister32(1),
213 i.InputRegister32(2));
214 break;
215 case kArm64Msub:
216 __ Msub(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1),
217 i.InputRegister(2));
218 break;
219 case kArm64Msub32:
220 __ Msub(i.OutputRegister32(), i.InputRegister32(0), i.InputRegister32(1),
221 i.InputRegister32(2));
222 break;
223 case kArm64Mneg:
224 __ Mneg(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
225 break;
226 case kArm64Mneg32:
227 __ Mneg(i.OutputRegister32(), i.InputRegister32(0), i.InputRegister32(1));
228 break;
207 case kArm64Idiv: 229 case kArm64Idiv:
208 __ Sdiv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); 230 __ Sdiv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
209 break; 231 break;
210 case kArm64Idiv32: 232 case kArm64Idiv32:
211 __ Sdiv(i.OutputRegister32(), i.InputRegister32(0), i.InputRegister32(1)); 233 __ Sdiv(i.OutputRegister32(), i.InputRegister32(0), i.InputRegister32(1));
212 break; 234 break;
213 case kArm64Udiv: 235 case kArm64Udiv:
214 __ Udiv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); 236 __ Udiv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
215 break; 237 break;
216 case kArm64Udiv32: 238 case kArm64Udiv32:
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902 } 924 }
903 } 925 }
904 MarkLazyDeoptSite(); 926 MarkLazyDeoptSite();
905 } 927 }
906 928
907 #undef __ 929 #undef __
908 930
909 } // namespace compiler 931 } // namespace compiler
910 } // namespace internal 932 } // namespace internal
911 } // namespace v8 933 } // namespace v8
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