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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ | 5 #ifndef V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ |
6 #define V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ | 6 #define V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
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72 V(X64StoreWriteBarrier) | 72 V(X64StoreWriteBarrier) |
73 | 73 |
74 | 74 |
75 // Addressing modes represent the "shape" of inputs to an instruction. | 75 // Addressing modes represent the "shape" of inputs to an instruction. |
76 // Many instructions support multiple addressing modes. Addressing modes | 76 // Many instructions support multiple addressing modes. Addressing modes |
77 // are encoded into the InstructionCode of the instruction and tell the | 77 // are encoded into the InstructionCode of the instruction and tell the |
78 // code generator after register allocation which assembler method to call. | 78 // code generator after register allocation which assembler method to call. |
79 // | 79 // |
80 // We use the following local notation for addressing modes: | 80 // We use the following local notation for addressing modes: |
81 // | 81 // |
82 // R = register | 82 // M = memory operand |
83 // O = register or stack slot | 83 // R = base register |
84 // D = double register | 84 // N = index register * N for N in {1, 2, 4, 8} |
85 // I = immediate (handle, external, int32) | 85 // I = immediate displacement (int32_t) |
86 // MR = [register] | 86 |
87 // MI = [immediate] | |
88 // MRN = [register + register * N in {1, 2, 4, 8}] | |
89 // MRI = [register + immediate] | |
90 // MRNI = [register + register * N in {1, 2, 4, 8} + immediate] | |
91 #define TARGET_ADDRESSING_MODE_LIST(V) \ | 87 #define TARGET_ADDRESSING_MODE_LIST(V) \ |
92 V(MR) /* [%r1] */ \ | 88 V(MR) /* [%r1 ] */ \ |
93 V(MRI) /* [%r1 + K] */ \ | 89 V(MRI) /* [%r1 + K] */ \ |
94 V(MR1I) /* [%r1 + %r2 + K] */ \ | 90 V(MR1) /* [%r1 + %r2*1 ] */ \ |
| 91 V(MR2) /* [%r1 + %r2*2 ] */ \ |
| 92 V(MR4) /* [%r1 + %r2*4 ] */ \ |
| 93 V(MR8) /* [%r1 + %r2*8 ] */ \ |
| 94 V(MR1I) /* [%r1 + %r2*1 + K] */ \ |
95 V(MR2I) /* [%r1 + %r2*2 + K] */ \ | 95 V(MR2I) /* [%r1 + %r2*2 + K] */ \ |
96 V(MR4I) /* [%r1 + %r2*4 + K] */ \ | 96 V(MR4I) /* [%r1 + %r2*3 + K] */ \ |
97 V(MR8I) /* [%r1 + %r2*8 + K] */ | 97 V(MR8I) /* [%r1 + %r2*4 + K] */ \ |
| 98 V(M1) /* [ %r2*1 ] */ \ |
| 99 V(M2) /* [ %r2*2 ] */ \ |
| 100 V(M4) /* [ %r2*4 ] */ \ |
| 101 V(M8) /* [ %r2*8 ] */ \ |
| 102 V(M1I) /* [ %r2*1 + K] */ \ |
| 103 V(M2I) /* [ %r2*2 + K] */ \ |
| 104 V(M4I) /* [ %r2*4 + K] */ \ |
| 105 V(M8I) /* [ %r2*8 + K] */ |
98 | 106 |
99 } // namespace compiler | 107 } // namespace compiler |
100 } // namespace internal | 108 } // namespace internal |
101 } // namespace v8 | 109 } // namespace v8 |
102 | 110 |
103 #endif // V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ | 111 #endif // V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ |
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