Handle add, adc, etc., mfence, div, idiv, mul in the assembler.

tests_lit/llvm2ice_tests/test_i1.ll

 ; Tests various aspects of i1 related lowering.
 
 ; RUN: %p2i -i %s -a -O2 --verbose none \
 ; RUN:   | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \
 ; RUN:   | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s
 ; RUN: %p2i -i %s -a -Om1 --verbose none \
 ; RUN:   | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \
 ; RUN:   | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s
 ; RUN: %p2i -i %s -a --verbose none | FileCheck --check-prefix=ERRORS %s
 ; RUN: %p2i -i %s --insts | %szdiff %s | FileCheck --check-prefix=DUMP %s
 
+; Test that and with true uses immediate 1, not -1.
+define internal i32 @testAndTrue(i32 %arg) {
+entry:
+  %arg_i1 = trunc i32 %arg to i1
+  %result_i1 = and i1 %arg_i1, true
+  %result = zext i1 %result_i1 to i32
+  ret i32 %result
+}
+; CHECK-LABEL: testAndTrue
+; CHECK: and {{.*}}, 1
+
+; Test that or with true uses immediate 1, not -1.
+define internal i32 @testOrTrue(i32 %arg) {
+entry:
+  %arg_i1 = trunc i32 %arg to i1
+  %result_i1 = or i1 %arg_i1, true
+  %result = zext i1 %result_i1 to i32
+  ret i32 %result
+}
+; CHECK-LABEL: testOrTrue
+; CHECK: or {{.*}}, 1
+
 ; Test that xor with true uses immediate 1, not -1.
 define internal i32 @testXorTrue(i32 %arg) {
 entry:
   %arg_i1 = trunc i32 %arg to i1
   %result_i1 = xor i1 %arg_i1, true
   %result = zext i1 %result_i1 to i32
   ret i32 %result
 }
 ; CHECK-LABEL: testXorTrue
 ; CHECK: xor {{.*}}, 1
@@ skipping 151 matching lines @@
 }
 ; CHECK-LABEL: testFptosiDouble
 ; CHECK: cvttsd2si
 ; CHECK: and {{.*}}, 1
 ; CHECK: movzx [[REG:.*]],
 ; CHECK-NEXT: shl [[REG]], 31
 ; CHECK-NEXT: sar [[REG]], 31
 
 ; ERRORS-NOT: ICE translation error
 ; DUMP-NOT: SZ