Handle add, adc, etc., mfence, div, idiv, mul in the assembler.

src/IceInstX8632.cpp

 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the InstX8632 and OperandX8632 classes,
@@ skipping 327 matching lines @@
                   intptr_t StartPosition) {
   intptr_t EndPosition = Asm->GetPosition();
   intptr_t LastFixupLoc = -1;
   AssemblerFixup *LastFixup = NULL;
   if (Asm->GetLatestFixup()) {
     LastFixup = Asm->GetLatestFixup();
     LastFixupLoc = LastFixup->position();
   }
   if (LastFixupLoc < StartPosition) {
     // The fixup doesn't apply to this current block.
-    for (intptr_t i = 0; i < EndPosition - StartPosition; ++i) {
-      Str << "\t.byte "
-          << static_cast<uint32_t>(Asm->LoadBuffer<uint8_t>(StartPosition + i))
-          << "\n";
+    for (intptr_t i = StartPosition; i < EndPosition; ++i) {
+      Str << "\t.byte 0x";
+      Str.write_hex(Asm->LoadBuffer<uint8_t>(i));
+      Str << "\n";
     }
     return;
   }
   const intptr_t FixupSize = 4;
   assert(LastFixupLoc + FixupSize <= EndPosition);
   // The fixup does apply to this current block.
-  for (intptr_t i = 0; i < LastFixupLoc - StartPosition; ++i) {
-    Str << "\t.byte "
-        << static_cast<uint32_t>(Asm->LoadBuffer<uint8_t>(StartPosition + i))
-        << "\n";
+  for (intptr_t i = StartPosition; i < LastFixupLoc; ++i) {
+    Str << "\t.byte 0x";
+    Str.write_hex(Asm->LoadBuffer<uint8_t>(i));
+    Str << "\n";
   }
   Str << "\t.long " << LastFixup->value()->getName();
   if (LastFixup->value()->getOffset()) {
     Str << " + " << LastFixup->value()->getOffset();
   }
   Str << "\n";
   for (intptr_t i = LastFixupLoc + FixupSize; i < EndPosition; ++i) {
-    Str << "\t.byte " << static_cast<uint32_t>(Asm->LoadBuffer<uint8_t>(i))
-        << "\n";
+    Str << "\t.byte 0x";
+    Str.write_hex(Asm->LoadBuffer<uint8_t>(i));
+    Str << "\n";
   }
 }
 
 } // end of anonymous namespace
 
 void InstX8632::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "[X8632] ";
   Inst::dump(Func);
 }
@@ skipping 90 matching lines @@
     if (ShiftReg && ShiftReg->getRegNum() == RegX8632::Reg_ecx) {
       Str << "cl";
       EmittedSrc1 = true;
     }
   }
   if (!EmittedSrc1)
     Inst->getSrc(1)->emit(Func);
   Str << "\n";
 }
 
-void emitIASVarTyGPR(const Cfg *Func, Type Ty, const Variable *Var,
-                     const x86::AssemblerX86::GPREmitterOneOp &Emitter) {
+void emitIASOpTyGPR(const Cfg *Func, Type Ty, const Operand *Op,
+                    const x86::AssemblerX86::GPREmitterOneOp &Emitter) {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
-  if (Var->hasReg()) {
-    // We cheat a little and use GPRRegister even for byte operations.
-    RegX8632::GPRRegister VarReg =
-        RegX8632::getEncodedByteRegOrGPR(Ty, Var->getRegNum());
-    (Asm->*(Emitter.Reg))(Ty, VarReg);
+  if (const Variable *Var = llvm::dyn_cast<Variable>(Op)) {
+    if (Var->hasReg()) {
+      // We cheat a little and use GPRRegister even for byte operations.
+      RegX8632::GPRRegister VarReg =
+          RegX8632::getEncodedByteRegOrGPR(Ty, Var->getRegNum());
+      (Asm->*(Emitter.Reg))(Ty, VarReg);
+    } else {
+      x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
+                                 ->stackVarToAsmOperand(Var));
+      (Asm->*(Emitter.Addr))(Ty, StackAddr);
+    }
+  } else if (const OperandX8632Mem *Mem = llvm::dyn_cast<OperandX8632Mem>(Op)) {
+    (Asm->*(Emitter.Addr))(Ty, Mem->toAsmAddress(Asm));
   } else {
-    x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
-                               ->stackVarToAsmOperand(Var));
-    (Asm->*(Emitter.Addr))(Ty, StackAddr);
+    llvm_unreachable("Unexpected operand type");
   }
   Ostream &Str = Func->getContext()->getStrEmit();
   emitIASBytes(Str, Asm, StartPosition);
 }
 
 void emitIASRegOpTyGPR(const Cfg *Func, Type Ty, const Variable *Var,
                        const Operand *Src,
                        const x86::AssemblerX86::GPREmitterRegOp &Emitter) {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
@@ skipping 155 matching lines @@
     &x86::AssemblerX86::bsr, &x86::AssemblerX86::bsr, NULL};
 template <>
 const x86::AssemblerX86::GPREmitterRegOp InstX8632Lea::Emitter = {
     /* reg/reg and reg/imm are illegal */ NULL, &x86::AssemblerX86::lea, NULL};
 
 // Unary XMM ops
 template <>
 const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Sqrtss::Emitter = {
     &x86::AssemblerX86::sqrtss, &x86::AssemblerX86::sqrtss, NULL};
 
+// Binary GPR ops
+template <>
+const x86::AssemblerX86::GPREmitterRegOp InstX8632Add::Emitter = {
+    &x86::AssemblerX86::add, &x86::AssemblerX86::add, &x86::AssemblerX86::add};
+template <>
+const x86::AssemblerX86::GPREmitterRegOp InstX8632Adc::Emitter = {
+    &x86::AssemblerX86::adc, &x86::AssemblerX86::adc, &x86::AssemblerX86::adc};
+template <>
+const x86::AssemblerX86::GPREmitterRegOp InstX8632And::Emitter = {
+    &x86::AssemblerX86::And, &x86::AssemblerX86::And, &x86::AssemblerX86::And};
+template <>
+const x86::AssemblerX86::GPREmitterRegOp InstX8632Or::Emitter = {
+    &x86::AssemblerX86::Or, &x86::AssemblerX86::Or, &x86::AssemblerX86::Or};
+template <>
+const x86::AssemblerX86::GPREmitterRegOp InstX8632Sbb::Emitter = {
+    &x86::AssemblerX86::sbb, &x86::AssemblerX86::sbb, &x86::AssemblerX86::sbb};
+template <>
+const x86::AssemblerX86::GPREmitterRegOp InstX8632Sub::Emitter = {
+    &x86::AssemblerX86::sub, &x86::AssemblerX86::sub, &x86::AssemblerX86::sub};
+template <>
+const x86::AssemblerX86::GPREmitterRegOp InstX8632Xor::Emitter = {
+    &x86::AssemblerX86::Xor, &x86::AssemblerX86::Xor, &x86::AssemblerX86::Xor};
+
 // Binary XMM ops
 template <>
 const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Addss::Emitter = {
     &x86::AssemblerX86::addss, &x86::AssemblerX86::addss, NULL};
 template <>
 const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Addps::Emitter = {
     &x86::AssemblerX86::addps, &x86::AssemblerX86::addps, NULL};
 template <>
 const x86::AssemblerX86::XmmEmitterTwoOps InstX8632Divss::Emitter = {
     &x86::AssemblerX86::divss, &x86::AssemblerX86::divss, NULL};
@@ skipping 112 matching lines @@
 }
 
 template <> void InstX8632Div::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 3);
   Str << "\t" << Opcode << "\t";
   getSrc(1)->emit(Func);
   Str << "\n";
 }
 
+template <> void InstX8632Div::emitIAS(const Cfg *Func) const {
+  assert(getSrcSize() == 3);
+  const Operand *Src = getSrc(1);
+  Type Ty = Src->getType();
+  const static x86::AssemblerX86::GPREmitterOneOp Emitter = {
+      &x86::AssemblerX86::div, &x86::AssemblerX86::div};
+  emitIASOpTyGPR(Func, Ty, Src, Emitter);
+}
+
 template <> void InstX8632Idiv::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 3);
   Str << "\t" << Opcode << "\t";
   getSrc(1)->emit(Func);
   Str << "\n";
 }
 
+template <> void InstX8632Idiv::emitIAS(const Cfg *Func) const {
+  assert(getSrcSize() == 3);
+  const Operand *Src = getSrc(1);
+  Type Ty = Src->getType();
+  const static x86::AssemblerX86::GPREmitterOneOp Emitter = {
+      &x86::AssemblerX86::idiv, &x86::AssemblerX86::idiv};
+  emitIASOpTyGPR(Func, Ty, Src, Emitter);
+}
 
 namespace {
 
 // pblendvb and blendvps take xmm0 as a final implicit argument.
 void emitVariableBlendInst(const char *Opcode, const Inst *Inst,
                            const Cfg *Func) {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(Inst->getSrcSize() == 3);
   assert(llvm::isa<Variable>(Inst->getSrc(2)));
   assert(llvm::cast<Variable>(Inst->getSrc(2))->getRegNum() ==
@@ skipping 100 matching lines @@
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   assert(llvm::isa<Variable>(getSrc(0)));
   assert(llvm::dyn_cast<Variable>(getSrc(0))->getRegNum() == RegX8632::Reg_eax);
   assert(getDest()->getRegNum() == RegX8632::Reg_eax); // TODO: allow edx?
   Str << "\tmul\t";
   getSrc(1)->emit(Func);
   Str << "\n";
 }
 
+void InstX8632Mul::emitIAS(const Cfg *Func) const {
+  assert(getSrcSize() == 2);
+  assert(llvm::isa<Variable>(getSrc(0)));
+  assert(llvm::dyn_cast<Variable>(getSrc(0))->getRegNum() == RegX8632::Reg_eax);
+  assert(getDest()->getRegNum() == RegX8632::Reg_eax); // TODO: allow edx?
+  const Operand *Src = getSrc(1);
+  Type Ty = Src->getType();
+  const static x86::AssemblerX86::GPREmitterOneOp Emitter = {
+      &x86::AssemblerX86::mul, &x86::AssemblerX86::mul};
+  emitIASOpTyGPR(Func, Ty, Src, Emitter);
+}
+
 void InstX8632Mul::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   dumpDest(Func);
   Str << " = mul." << getDest()->getType() << " ";
   dumpSources(Func);
 }
 
 void InstX8632Shld::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 3);
@@ skipping 300 matching lines @@
   Str << "test." << getSrc(0)->getType() << " ";
   dumpSources(Func);
 }
 
 void InstX8632Mfence::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 0);
   Str << "\tmfence\n";
 }
 
+void InstX8632Mfence::emitIAS(const Cfg *Func) const {
+  Ostream &Str = Func->getContext()->getStrEmit();
+  x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+  intptr_t StartPosition = Asm->GetPosition();
+  Asm->mfence();
+  emitIASBytes(Str, Asm, StartPosition);
+}
+
 void InstX8632Mfence::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "mfence\n";
 }
 
 void InstX8632Store::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   Str << "\tmov" << TypeX8632Attributes[getSrc(0)->getType()].SdSsString
       << "\t";
@@ skipping 395 matching lines @@
 void InstX8632AdjustStack::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   Str << "\tsub\tesp, " << Amount << "\n";
   Func->getTarget()->updateStackAdjustment(Amount);
 }
 
 void InstX8632AdjustStack::emitIAS(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
-  Asm->subl(RegX8632::Encoded_Reg_esp, x86::Immediate(Amount));
+  Asm->sub(IceType_i32, RegX8632::Encoded_Reg_esp, x86::Immediate(Amount));
   emitIASBytes(Str, Asm, StartPosition);
   Func->getTarget()->updateStackAdjustment(Amount);
 }
 
 void InstX8632AdjustStack::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "esp = sub.i32 esp, " << Amount;
 }
 
 void InstX8632Push::emit(const Cfg *Func) const {
@@ skipping 316 matching lines @@
   }
   Str << "(";
   if (Func)
     Var->dump(Func);
   else
     Var->dump(Str);
   Str << ")";
 }
 
 } // end of namespace Ice