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1 ; Tests insertelement and extractelement vector instructions. | 1 ; Tests insertelement and extractelement vector instructions. |
2 | 2 |
3 ; RUN: %p2i -i %s --insts | FileCheck %s | 3 ; RUN: %p2i -i %s --insts | FileCheck %s |
4 | 4 |
5 ; TODO(kschimpf): Change index arguments to valid constant indices once | 5 ; TODO(kschimpf): Change index arguments to valid constant indices once |
6 ; we can handle constants. | 6 ; we can handle constants. |
7 | 7 |
8 define void @ExtractV4xi1(<4 x i1> %v, i32 %i) { | 8 define void @ExtractV4xi1(<4 x i1> %v, i32 %i) { |
9 entry: | 9 entry: |
10 %e = extractelement <4 x i1> %v, i32 %i | 10 %e = extractelement <4 x i1> %v, i32 %i |
(...skipping 82 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
93 entry: | 93 entry: |
94 %e = trunc i32 %pe to i1 | 94 %e = trunc i32 %pe to i1 |
95 %r = insertelement <4 x i1> %v, i1 %e, i32 %i | 95 %r = insertelement <4 x i1> %v, i1 %e, i32 %i |
96 ret <4 x i1> %r | 96 ret <4 x i1> %r |
97 } | 97 } |
98 | 98 |
99 ; CHECK-NEXT: define <4 x i1> @InsertV4xi1(<4 x i1> %v, i32 %pe, i32 %i) { | 99 ; CHECK-NEXT: define <4 x i1> @InsertV4xi1(<4 x i1> %v, i32 %pe, i32 %i) { |
100 ; CHECK-NEXT: entry: | 100 ; CHECK-NEXT: entry: |
101 ; CHECK-NEXT: %e = trunc i32 %pe to i1 | 101 ; CHECK-NEXT: %e = trunc i32 %pe to i1 |
102 ; CHECK-NEXT: %r = insertelement <4 x i1> %v, i1 %e, i32 %i | 102 ; CHECK-NEXT: %r = insertelement <4 x i1> %v, i1 %e, i32 %i |
103 ; CHECK-NEXT: ret i1 %r | 103 ; CHECK-NEXT: ret <4 x i1> %r |
104 ; CHECK-NEXT: } | 104 ; CHECK-NEXT: } |
105 | 105 |
106 define <8 x i1> @InsertV8xi1(<8 x i1> %v, i32 %pe, i32 %i) { | 106 define <8 x i1> @InsertV8xi1(<8 x i1> %v, i32 %pe, i32 %i) { |
107 entry: | 107 entry: |
108 %e = trunc i32 %pe to i1 | 108 %e = trunc i32 %pe to i1 |
109 %r = insertelement <8 x i1> %v, i1 %e, i32 %i | 109 %r = insertelement <8 x i1> %v, i1 %e, i32 %i |
110 ret <8 x i1> %r | 110 ret <8 x i1> %r |
111 } | 111 } |
112 | 112 |
113 ; CHECK-NEXT: define <8 x i1> @InsertV8xi1(<8 x i1> %v, i32 %pe, i32 %i) { | 113 ; CHECK-NEXT: define <8 x i1> @InsertV8xi1(<8 x i1> %v, i32 %pe, i32 %i) { |
114 ; CHECK-NEXT: entry: | 114 ; CHECK-NEXT: entry: |
115 ; CHECK-NEXT: %e = trunc i32 %pe to i1 | 115 ; CHECK-NEXT: %e = trunc i32 %pe to i1 |
116 ; CHECK-NEXT: %r = insertelement <8 x i1> %v, i1 %e, i32 %i | 116 ; CHECK-NEXT: %r = insertelement <8 x i1> %v, i1 %e, i32 %i |
117 ; CHECK-NEXT: ret i1 %r | 117 ; CHECK-NEXT: ret <8 x i1> %r |
118 ; CHECK-NEXT: } | 118 ; CHECK-NEXT: } |
119 | 119 |
120 define <16 x i1> @InsertV16xi1(<16 x i1> %v, i32 %pe, i32 %i) { | 120 define <16 x i1> @InsertV16xi1(<16 x i1> %v, i32 %pe, i32 %i) { |
121 entry: | 121 entry: |
122 %e = trunc i32 %pe to i1 | 122 %e = trunc i32 %pe to i1 |
123 %r = insertelement <16 x i1> %v, i1 %e, i32 %i | 123 %r = insertelement <16 x i1> %v, i1 %e, i32 %i |
124 ret <16 x i1> %r | 124 ret <16 x i1> %r |
125 } | 125 } |
126 | 126 |
127 ; CHECK-NEXT: define <16 x i1> @InsertV16xi1(<16 x i1> %v, i32 %pe, i32 %i) { | 127 ; CHECK-NEXT: define <16 x i1> @InsertV16xi1(<16 x i1> %v, i32 %pe, i32 %i) { |
128 ; CHECK-NEXT: entry: | 128 ; CHECK-NEXT: entry: |
129 ; CHECK-NEXT: %e = trunc i32 %pe to i1 | 129 ; CHECK-NEXT: %e = trunc i32 %pe to i1 |
130 ; CHECK-NEXT: %r = insertelement <16 x i1> %v, i1 %e, i32 %i | 130 ; CHECK-NEXT: %r = insertelement <16 x i1> %v, i1 %e, i32 %i |
131 ; CHECK-NEXT: ret i1 %r | 131 ; CHECK-NEXT: ret <16 x i1> %r |
132 ; CHECK-NEXT: } | 132 ; CHECK-NEXT: } |
133 | 133 |
134 define <16 x i8> @InsertV16xi8(<16 x i8> %v, i32 %pe, i32 %i) { | 134 define <16 x i8> @InsertV16xi8(<16 x i8> %v, i32 %pe, i32 %i) { |
135 entry: | 135 entry: |
136 %e = trunc i32 %pe to i8 | 136 %e = trunc i32 %pe to i8 |
137 %r = insertelement <16 x i8> %v, i8 %e, i32 %i | 137 %r = insertelement <16 x i8> %v, i8 %e, i32 %i |
138 ret <16 x i8> %r | 138 ret <16 x i8> %r |
139 } | 139 } |
140 | 140 |
141 ; CHECK-NEXT: define <16 x i8> @InsertV16xi8(<16 x i8> %v, i32 %pe, i32 %i) { | 141 ; CHECK-NEXT: define <16 x i8> @InsertV16xi8(<16 x i8> %v, i32 %pe, i32 %i) { |
142 ; CHECK-NEXT: entry: | 142 ; CHECK-NEXT: entry: |
143 ; CHECK-NEXT: %e = trunc i32 %pe to i8 | 143 ; CHECK-NEXT: %e = trunc i32 %pe to i8 |
144 ; CHECK-NEXT: %r = insertelement <16 x i8> %v, i8 %e, i32 %i | 144 ; CHECK-NEXT: %r = insertelement <16 x i8> %v, i8 %e, i32 %i |
145 ; CHECK-NEXT: ret i8 %r | 145 ; CHECK-NEXT: ret <16 x i8> %r |
146 ; CHECK-NEXT: } | 146 ; CHECK-NEXT: } |
147 | 147 |
148 define <8 x i16> @InsertV8xi16(<8 x i16> %v, i32 %pe, i32 %i) { | 148 define <8 x i16> @InsertV8xi16(<8 x i16> %v, i32 %pe, i32 %i) { |
149 entry: | 149 entry: |
150 %e = trunc i32 %pe to i16 | 150 %e = trunc i32 %pe to i16 |
151 %r = insertelement <8 x i16> %v, i16 %e, i32 %i | 151 %r = insertelement <8 x i16> %v, i16 %e, i32 %i |
152 ret <8 x i16> %r | 152 ret <8 x i16> %r |
153 } | 153 } |
154 | 154 |
155 ; CHECK-NEXT: define <8 x i16> @InsertV8xi16(<8 x i16> %v, i32 %pe, i32 %i) { | 155 ; CHECK-NEXT: define <8 x i16> @InsertV8xi16(<8 x i16> %v, i32 %pe, i32 %i) { |
156 ; CHECK-NEXT: entry: | 156 ; CHECK-NEXT: entry: |
157 ; CHECK-NEXT: %e = trunc i32 %pe to i16 | 157 ; CHECK-NEXT: %e = trunc i32 %pe to i16 |
158 ; CHECK-NEXT: %r = insertelement <8 x i16> %v, i16 %e, i32 %i | 158 ; CHECK-NEXT: %r = insertelement <8 x i16> %v, i16 %e, i32 %i |
159 ; CHECK-NEXT: ret i16 %r | 159 ; CHECK-NEXT: ret <8 x i16> %r |
160 ; CHECK-NEXT: } | 160 ; CHECK-NEXT: } |
161 | 161 |
162 define <4 x i32> @InsertV4xi32(<4 x i32> %v, i32 %e, i32 %i) { | 162 define <4 x i32> @InsertV4xi32(<4 x i32> %v, i32 %e, i32 %i) { |
163 entry: | 163 entry: |
164 %r = insertelement <4 x i32> %v, i32 %e, i32 %i | 164 %r = insertelement <4 x i32> %v, i32 %e, i32 %i |
165 ret <4 x i32> %r | 165 ret <4 x i32> %r |
166 } | 166 } |
167 | 167 |
168 ; CHECK-NEXT: define <4 x i32> @InsertV4xi32(<4 x i32> %v, i32 %e, i32 %i) { | 168 ; CHECK-NEXT: define <4 x i32> @InsertV4xi32(<4 x i32> %v, i32 %e, i32 %i) { |
169 ; CHECK-NEXT: entry: | 169 ; CHECK-NEXT: entry: |
170 ; CHECK-NEXT: %r = insertelement <4 x i32> %v, i32 %e, i32 %i | 170 ; CHECK-NEXT: %r = insertelement <4 x i32> %v, i32 %e, i32 %i |
171 ; CHECK-NEXT: ret i32 %r | 171 ; CHECK-NEXT: ret <4 x i32> %r |
172 ; CHECK-NEXT: } | 172 ; CHECK-NEXT: } |
173 | 173 |
174 define <4 x float> @InsertV4xfloat(<4 x float> %v, float %e, i32 %i) { | 174 define <4 x float> @InsertV4xfloat(<4 x float> %v, float %e, i32 %i) { |
175 entry: | 175 entry: |
176 %r = insertelement <4 x float> %v, float %e, i32 %i | 176 %r = insertelement <4 x float> %v, float %e, i32 %i |
177 ret <4 x float> %r | 177 ret <4 x float> %r |
178 } | 178 } |
179 | 179 |
180 ; CHECK-NEXT: define <4 x float> @InsertV4xfloat(<4 x float> %v, float %e, i32 %
i) { | 180 ; CHECK-NEXT: define <4 x float> @InsertV4xfloat(<4 x float> %v, float %e, i32 %
i) { |
181 ; CHECK-NEXT: entry: | 181 ; CHECK-NEXT: entry: |
182 ; CHECK-NEXT: %r = insertelement <4 x float> %v, float %e, i32 %i | 182 ; CHECK-NEXT: %r = insertelement <4 x float> %v, float %e, i32 %i |
183 ; CHECK-NEXT: ret float %r | 183 ; CHECK-NEXT: ret <4 x float> %r |
184 ; CHECK-NEXT: } | 184 ; CHECK-NEXT: } |
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