MIPS: Add turbofan support for mips32.

src/compiler/mips/linkage-mips.cc

Index: src/compiler/mips/linkage-mips.cc
diff --git a/src/compiler/arm/linkage-arm.cc b/src/compiler/mips/linkage-mips.cc
similarity index 75%
copy from src/compiler/arm/linkage-arm.cc
copy to src/compiler/mips/linkage-mips.cc
index 6673a475bd809b179bab25b8f131f2a8fe6e8fc6..b9f3fa21c3187ca15182f68a7847987f97a9689f 100644
--- a/src/compiler/arm/linkage-arm.cc
+++ b/src/compiler/mips/linkage-mips.cc
@@ -14,26 +14,26 @@ namespace v8 {
 namespace internal {
 namespace compiler {
 
-struct ArmLinkageHelperTraits {
-  static Register ReturnValueReg() { return r0; }
-  static Register ReturnValue2Reg() { return r1; }
-  static Register JSCallFunctionReg() { return r1; }
+struct MipsLinkageHelperTraits {
+  static Register ReturnValueReg() { return v0; }
+  static Register ReturnValue2Reg() { return v1; }
+  static Register JSCallFunctionReg() { return a1; }
   static Register ContextReg() { return cp; }
-  static Register RuntimeCallFunctionReg() { return r1; }
-  static Register RuntimeCallArgCountReg() { return r0; }
+  static Register RuntimeCallFunctionReg() { return a1; }
+  static Register RuntimeCallArgCountReg() { return a0; }
   static RegList CCalleeSaveRegisters() {
-    return r4.bit() | r5.bit() | r6.bit() | r7.bit() | r8.bit() | r9.bit() |
-           r10.bit();
+    return s0.bit() | s1.bit() | s2.bit() | s3.bit() | s4.bit() | s5.bit() |
+           s6.bit() | s7.bit();
   }
   static Register CRegisterParameter(int i) {
-    static Register register_parameters[] = {r0, r1, r2, r3};
+    static Register register_parameters[] = {a0, a1, a2, a3};
     return register_parameters[i];
   }
   static int CRegisterParametersLength() { return 4; }
 };
 
 
-typedef LinkageHelper<ArmLinkageHelperTraits> LH;
+typedef LinkageHelper<MipsLinkageHelperTraits> LH;
 
 CallDescriptor* Linkage::GetJSCallDescriptor(int parameter_count, Zone* zone) {
   return LH::GetJSCallDescriptor(zone, parameter_count);