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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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69 probed_features |= static_cast<uint64_t>(1) << SSE4_1; | 69 probed_features |= static_cast<uint64_t>(1) << SSE4_1; |
70 } | 70 } |
71 if (cpu.has_sse3()) { | 71 if (cpu.has_sse3()) { |
72 probed_features |= static_cast<uint64_t>(1) << SSE3; | 72 probed_features |= static_cast<uint64_t>(1) << SSE3; |
73 } | 73 } |
74 | 74 |
75 // SSE2 must be available on every x64 CPU. | 75 // SSE2 must be available on every x64 CPU. |
76 ASSERT(cpu.has_sse2()); | 76 ASSERT(cpu.has_sse2()); |
77 probed_features |= static_cast<uint64_t>(1) << SSE2; | 77 probed_features |= static_cast<uint64_t>(1) << SSE2; |
78 | 78 |
79 // CMOD must be available on every x64 CPU. | 79 // CMOV must be available on every x64 CPU. |
80 ASSERT(cpu.has_cmov()); | 80 ASSERT(cpu.has_cmov()); |
81 probed_features |= static_cast<uint64_t>(1) << CMOV; | 81 probed_features |= static_cast<uint64_t>(1) << CMOV; |
82 | 82 |
83 // SAHF is not generally available in long mode. | 83 // SAHF is not generally available in long mode. |
84 if (cpu.has_sahf()) { | 84 if (cpu.has_sahf()) { |
85 probed_features |= static_cast<uint64_t>(1) << SAHF; | 85 probed_features |= static_cast<uint64_t>(1) << SAHF; |
86 } | 86 } |
87 | 87 |
88 uint64_t platform_features = OS::CpuFeaturesImpliedByPlatform(); | 88 uint64_t platform_features = OS::CpuFeaturesImpliedByPlatform(); |
89 supported_ = probed_features | platform_features; | 89 supported_ = probed_features | platform_features; |
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2489 | 2489 |
2490 void Assembler::andps(XMMRegister dst, XMMRegister src) { | 2490 void Assembler::andps(XMMRegister dst, XMMRegister src) { |
2491 EnsureSpace ensure_space(this); | 2491 EnsureSpace ensure_space(this); |
2492 emit_optional_rex_32(dst, src); | 2492 emit_optional_rex_32(dst, src); |
2493 emit(0x0F); | 2493 emit(0x0F); |
2494 emit(0x54); | 2494 emit(0x54); |
2495 emit_sse_operand(dst, src); | 2495 emit_sse_operand(dst, src); |
2496 } | 2496 } |
2497 | 2497 |
2498 | 2498 |
| 2499 void Assembler::andps(XMMRegister dst, const Operand& src) { |
| 2500 EnsureSpace ensure_space(this); |
| 2501 emit_optional_rex_32(dst, src); |
| 2502 emit(0x0F); |
| 2503 emit(0x54); |
| 2504 emit_sse_operand(dst, src); |
| 2505 } |
| 2506 |
| 2507 |
2499 void Assembler::orps(XMMRegister dst, XMMRegister src) { | 2508 void Assembler::orps(XMMRegister dst, XMMRegister src) { |
2500 EnsureSpace ensure_space(this); | 2509 EnsureSpace ensure_space(this); |
2501 emit_optional_rex_32(dst, src); | 2510 emit_optional_rex_32(dst, src); |
2502 emit(0x0F); | 2511 emit(0x0F); |
2503 emit(0x56); | 2512 emit(0x56); |
2504 emit_sse_operand(dst, src); | 2513 emit_sse_operand(dst, src); |
2505 } | 2514 } |
2506 | 2515 |
2507 | 2516 |
| 2517 void Assembler::orps(XMMRegister dst, const Operand& src) { |
| 2518 EnsureSpace ensure_space(this); |
| 2519 emit_optional_rex_32(dst, src); |
| 2520 emit(0x0F); |
| 2521 emit(0x56); |
| 2522 emit_sse_operand(dst, src); |
| 2523 } |
| 2524 |
| 2525 |
2508 void Assembler::xorps(XMMRegister dst, XMMRegister src) { | 2526 void Assembler::xorps(XMMRegister dst, XMMRegister src) { |
2509 EnsureSpace ensure_space(this); | 2527 EnsureSpace ensure_space(this); |
2510 emit_optional_rex_32(dst, src); | 2528 emit_optional_rex_32(dst, src); |
2511 emit(0x0F); | 2529 emit(0x0F); |
2512 emit(0x57); | 2530 emit(0x57); |
2513 emit_sse_operand(dst, src); | 2531 emit_sse_operand(dst, src); |
2514 } | 2532 } |
2515 | 2533 |
2516 | 2534 |
| 2535 void Assembler::xorps(XMMRegister dst, const Operand& src) { |
| 2536 EnsureSpace ensure_space(this); |
| 2537 emit_optional_rex_32(dst, src); |
| 2538 emit(0x0F); |
| 2539 emit(0x57); |
| 2540 emit_sse_operand(dst, src); |
| 2541 } |
| 2542 |
| 2543 |
| 2544 void Assembler::addps(XMMRegister dst, XMMRegister src) { |
| 2545 EnsureSpace ensure_space(this); |
| 2546 emit_optional_rex_32(dst, src); |
| 2547 emit(0x0F); |
| 2548 emit(0x58); |
| 2549 emit_sse_operand(dst, src); |
| 2550 } |
| 2551 |
| 2552 |
| 2553 void Assembler::addps(XMMRegister dst, const Operand& src) { |
| 2554 EnsureSpace ensure_space(this); |
| 2555 emit_optional_rex_32(dst, src); |
| 2556 emit(0x0F); |
| 2557 emit(0x58); |
| 2558 emit_sse_operand(dst, src); |
| 2559 } |
| 2560 |
| 2561 |
| 2562 void Assembler::subps(XMMRegister dst, XMMRegister src) { |
| 2563 EnsureSpace ensure_space(this); |
| 2564 emit_optional_rex_32(dst, src); |
| 2565 emit(0x0F); |
| 2566 emit(0x5C); |
| 2567 emit_sse_operand(dst, src); |
| 2568 } |
| 2569 |
| 2570 |
| 2571 void Assembler::subps(XMMRegister dst, const Operand& src) { |
| 2572 EnsureSpace ensure_space(this); |
| 2573 emit_optional_rex_32(dst, src); |
| 2574 emit(0x0F); |
| 2575 emit(0x5C); |
| 2576 emit_sse_operand(dst, src); |
| 2577 } |
| 2578 |
| 2579 |
| 2580 void Assembler::mulps(XMMRegister dst, XMMRegister src) { |
| 2581 EnsureSpace ensure_space(this); |
| 2582 emit_optional_rex_32(dst, src); |
| 2583 emit(0x0F); |
| 2584 emit(0x59); |
| 2585 emit_sse_operand(dst, src); |
| 2586 } |
| 2587 |
| 2588 |
| 2589 void Assembler::mulps(XMMRegister dst, const Operand& src) { |
| 2590 EnsureSpace ensure_space(this); |
| 2591 emit_optional_rex_32(dst, src); |
| 2592 emit(0x0F); |
| 2593 emit(0x59); |
| 2594 emit_sse_operand(dst, src); |
| 2595 } |
| 2596 |
| 2597 |
| 2598 void Assembler::divps(XMMRegister dst, XMMRegister src) { |
| 2599 EnsureSpace ensure_space(this); |
| 2600 emit_optional_rex_32(dst, src); |
| 2601 emit(0x0F); |
| 2602 emit(0x5E); |
| 2603 emit_sse_operand(dst, src); |
| 2604 } |
| 2605 |
| 2606 |
| 2607 void Assembler::divps(XMMRegister dst, const Operand& src) { |
| 2608 EnsureSpace ensure_space(this); |
| 2609 emit_optional_rex_32(dst, src); |
| 2610 emit(0x0F); |
| 2611 emit(0x5E); |
| 2612 emit_sse_operand(dst, src); |
| 2613 } |
| 2614 |
| 2615 |
2517 // SSE 2 operations. | 2616 // SSE 2 operations. |
2518 | 2617 |
2519 void Assembler::movd(XMMRegister dst, Register src) { | 2618 void Assembler::movd(XMMRegister dst, Register src) { |
2520 EnsureSpace ensure_space(this); | 2619 EnsureSpace ensure_space(this); |
2521 emit(0x66); | 2620 emit(0x66); |
2522 emit_optional_rex_32(dst, src); | 2621 emit_optional_rex_32(dst, src); |
2523 emit(0x0F); | 2622 emit(0x0F); |
2524 emit(0x6E); | 2623 emit(0x6E); |
2525 emit_sse_operand(dst, src); | 2624 emit_sse_operand(dst, src); |
2526 } | 2625 } |
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2669 emit_sse_operand(src, dst); | 2768 emit_sse_operand(src, dst); |
2670 } else { | 2769 } else { |
2671 emit_optional_rex_32(dst, src); | 2770 emit_optional_rex_32(dst, src); |
2672 emit(0x0F); | 2771 emit(0x0F); |
2673 emit(0x28); | 2772 emit(0x28); |
2674 emit_sse_operand(dst, src); | 2773 emit_sse_operand(dst, src); |
2675 } | 2774 } |
2676 } | 2775 } |
2677 | 2776 |
2678 | 2777 |
| 2778 void Assembler::shufps(XMMRegister dst, XMMRegister src, byte imm8) { |
| 2779 ASSERT(is_uint8(imm8)); |
| 2780 EnsureSpace ensure_space(this); |
| 2781 emit_optional_rex_32(src, dst); |
| 2782 emit(0x0F); |
| 2783 emit(0xC6); |
| 2784 emit_sse_operand(dst, src); |
| 2785 emit(imm8); |
| 2786 } |
| 2787 |
| 2788 |
2679 void Assembler::movapd(XMMRegister dst, XMMRegister src) { | 2789 void Assembler::movapd(XMMRegister dst, XMMRegister src) { |
2680 EnsureSpace ensure_space(this); | 2790 EnsureSpace ensure_space(this); |
2681 if (src.low_bits() == 4) { | 2791 if (src.low_bits() == 4) { |
2682 // Try to avoid an unnecessary SIB byte. | 2792 // Try to avoid an unnecessary SIB byte. |
2683 emit(0x66); | 2793 emit(0x66); |
2684 emit_optional_rex_32(src, dst); | 2794 emit_optional_rex_32(src, dst); |
2685 emit(0x0F); | 2795 emit(0x0F); |
2686 emit(0x29); | 2796 emit(0x29); |
2687 emit_sse_operand(src, dst); | 2797 emit_sse_operand(src, dst); |
2688 } else { | 2798 } else { |
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3107 bool RelocInfo::IsCodedSpecially() { | 3217 bool RelocInfo::IsCodedSpecially() { |
3108 // The deserializer needs to know whether a pointer is specially coded. Being | 3218 // The deserializer needs to know whether a pointer is specially coded. Being |
3109 // specially coded on x64 means that it is a relative 32 bit address, as used | 3219 // specially coded on x64 means that it is a relative 32 bit address, as used |
3110 // by branch instructions. | 3220 // by branch instructions. |
3111 return (1 << rmode_) & kApplyMask; | 3221 return (1 << rmode_) & kApplyMask; |
3112 } | 3222 } |
3113 | 3223 |
3114 } } // namespace v8::internal | 3224 } } // namespace v8::internal |
3115 | 3225 |
3116 #endif // V8_TARGET_ARCH_X64 | 3226 #endif // V8_TARGET_ARCH_X64 |
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