| OLD | NEW |
| 1 #ifndef AR9003_EEPROM_H | 1 #ifndef AR9003_EEPROM_H |
| 2 #define AR9003_EEPROM_H | 2 #define AR9003_EEPROM_H |
| 3 | 3 |
| 4 #include <linux/types.h> | 4 #include <linux/types.h> |
| 5 | 5 |
| 6 #define AR9300_EEP_VER 0xD000 | 6 #define AR9300_EEP_VER 0xD000 |
| 7 #define AR9300_EEP_VER_MINOR_MASK 0xFFF | 7 #define AR9300_EEP_VER_MINOR_MASK 0xFFF |
| 8 #define AR9300_EEP_MINOR_VER_1 0x1 | 8 #define AR9300_EEP_MINOR_VER_1 0x1 |
| 9 #define AR9300_EEP_MINOR_VER AR9300_EEP_MINOR_VER_1 | 9 #define AR9300_EEP_MINOR_VER AR9300_EEP_MINOR_VER_1 |
| 10 | 10 |
| (...skipping 44 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 55 #define AR9300_ANT_CHAIN_MASK 0x7 | 55 #define AR9300_ANT_CHAIN_MASK 0x7 |
| 56 #define AR9300_ANT_COMMON_MASK 0xf | 56 #define AR9300_ANT_COMMON_MASK 0xf |
| 57 #define AR9300_CHAIN_0_IDX 0 | 57 #define AR9300_CHAIN_0_IDX 0 |
| 58 #define AR9300_CHAIN_1_IDX 1 | 58 #define AR9300_CHAIN_1_IDX 1 |
| 59 #define AR9300_CHAIN_2_IDX 2 | 59 #define AR9300_CHAIN_2_IDX 2 |
| 60 | 60 |
| 61 #define AR928X_NUM_ANT_CHAIN_FIELDS 6 | 61 #define AR928X_NUM_ANT_CHAIN_FIELDS 6 |
| 62 #define AR928X_SIZE_ANT_CHAIN_FIELD 2 | 62 #define AR928X_SIZE_ANT_CHAIN_FIELD 2 |
| 63 #define AR928X_ANT_CHAIN_MASK 0x3 | 63 #define AR928X_ANT_CHAIN_MASK 0x3 |
| 64 | 64 |
| 65 #define AR9300_PAPRD_RATE_MASK 0x01ffffff |
| 66 #define AR9300_PAPRD_SCALE_1 0x0e000000 |
| 67 #define AR9300_PAPRD_SCALE_1_S 25 |
| 68 #define AR9300_PAPRD_SCALE_2 0x70000000 |
| 69 #define AR9300_PAPRD_SCALE_2_S 28 |
| 70 |
| 65 /* Delta from which to start power to pdadc table */ | 71 /* Delta from which to start power to pdadc table */ |
| 66 /* This offset is used in both open loop and closed loop power control | 72 /* This offset is used in both open loop and closed loop power control |
| 67 * schemes. In open loop power control, it is not really needed, but for | 73 * schemes. In open loop power control, it is not really needed, but for |
| 68 * the "sake of consistency" it was kept. For certain AP designs, this | 74 * the "sake of consistency" it was kept. For certain AP designs, this |
| 69 * value is overwritten by the value in the flag "pwrTableOffset" just | 75 * value is overwritten by the value in the flag "pwrTableOffset" just |
| 70 * before writing the pdadc vs pwr into the chip registers. | 76 * before writing the pdadc vs pwr into the chip registers. |
| 71 */ | 77 */ |
| 72 #define AR9300_PWR_TABLE_OFFSET 0 | 78 #define AR9300_PWR_TABLE_OFFSET 0 |
| 73 | 79 |
| 74 /* enable flags for voltage and temp compensation */ | 80 /* enable flags for voltage and temp compensation */ |
| (...skipping 260 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 335 struct cal_tgt_pow_ht | 341 struct cal_tgt_pow_ht |
| 336 calTargetPower5GHT40[AR9300_NUM_5G_40_TARGET_POWERS]; | 342 calTargetPower5GHT40[AR9300_NUM_5G_40_TARGET_POWERS]; |
| 337 u8 ctlIndex_5G[AR9300_NUM_CTLS_5G]; | 343 u8 ctlIndex_5G[AR9300_NUM_CTLS_5G]; |
| 338 u8 ctl_freqbin_5G[AR9300_NUM_CTLS_5G][AR9300_NUM_BAND_EDGES_5G]; | 344 u8 ctl_freqbin_5G[AR9300_NUM_CTLS_5G][AR9300_NUM_BAND_EDGES_5G]; |
| 339 struct cal_ctl_data_5g ctlPowerData_5G[AR9300_NUM_CTLS_5G]; | 345 struct cal_ctl_data_5g ctlPowerData_5G[AR9300_NUM_CTLS_5G]; |
| 340 } __packed; | 346 } __packed; |
| 341 | 347 |
| 342 s32 ar9003_hw_get_tx_gain_idx(struct ath_hw *ah); | 348 s32 ar9003_hw_get_tx_gain_idx(struct ath_hw *ah); |
| 343 s32 ar9003_hw_get_rx_gain_idx(struct ath_hw *ah); | 349 s32 ar9003_hw_get_rx_gain_idx(struct ath_hw *ah); |
| 344 | 350 |
| 351 unsigned int ar9003_get_paprd_scale_factor(struct ath_hw *ah, |
| 352 struct ath9k_channel *chan); |
| 353 |
| 345 #endif | 354 #endif |
| OLD | NEW |