Issue 598083007: [turbofan] Reduce shl with sar/shr and same shift amount to bit-and.

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Issue 598083007: [turbofan] Reduce shl with sar/shr and same shift amount to bit-and. (Closed)

Created:
6 years, 2 months ago by Benedikt Meurer

Modified:
6 years, 2 months ago

Reviewers:
Jarin

CC:
v8-dev

Base URL:
https://v8.googlecode.com/svn/branches/bleeding_edge

Project:
v8

Visibility:
Public.

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Description

[turbofan] Reduce shl with sar/shr and same shift amount to bit-and. The shl(sar(x, K), K) is a common pattern with typed loads/stores in asm.js. TEST=compiler-unittests,mjsunit/asm/int32array-unaligned R=jarin@chromium.org Committed: https://code.google.com/p/v8/source/detail?r=24238

Patch Set 1 #

Patch Set 2 : file naming. #

Created: 6 years, 2 months ago

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	Unified diffs	Side-by-side diffs	Delta from patch set	Stats (+103 lines, -0 lines)			Patch
M	src/compiler/machine-operator-reducer.h	View		1 chunk	+3 lines, -0 lines	0 comments	Download
M	src/compiler/machine-operator-reducer.cc	View		1 chunk	+14 lines, -0 lines	0 comments	Download
M	src/compiler/machine-operator-reducer-unittest.cc	View		1 chunk	+43 lines, -0 lines	0 comments	Download
A	test/mjsunit/asm/int32array-unaligned.js	View	1	1 chunk	+43 lines, -0 lines	0 comments	Download

Messages

Total messages: 3 (0 generated)

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Benedikt Meurer

6 years, 2 months ago (2014-09-26 07:36:11 UTC) #3

Message was sent while issue was closed.

Committed patchset #2 (id:20001) manually as 24238 (tree was closed).

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