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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 // | 4 // |
| 5 // Modified by the Subzero authors. | 5 // Modified by the Subzero authors. |
| 6 // | 6 // |
| 7 //===- subzero/src/assembler_ia32.h - Assembler for x86-32 ----------------===// | 7 //===- subzero/src/assembler_ia32.h - Assembler for x86-32 ----------------===// |
| 8 // | 8 // |
| 9 // The Subzero Code Generator | 9 // The Subzero Code Generator |
| 10 // | 10 // |
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| 534 void fnstcw(const Address &dst); | 534 void fnstcw(const Address &dst); |
| 535 void fldcw(const Address &src); | 535 void fldcw(const Address &src); |
| 536 | 536 |
| 537 void fistpl(const Address &dst); | 537 void fistpl(const Address &dst); |
| 538 void fistps(const Address &dst); | 538 void fistps(const Address &dst); |
| 539 void fildl(const Address &src); | 539 void fildl(const Address &src); |
| 540 void filds(const Address &src); | 540 void filds(const Address &src); |
| 541 | 541 |
| 542 void fincstp(); | 542 void fincstp(); |
| 543 | 543 |
| 544 void xchgl(GPRRegister dst, GPRRegister src); | |
| 545 | |
| 546 void cmpl(GPRRegister reg, const Immediate &imm); | 544 void cmpl(GPRRegister reg, const Immediate &imm); |
| 547 void cmpl(GPRRegister reg0, GPRRegister reg1); | 545 void cmpl(GPRRegister reg0, GPRRegister reg1); |
| 548 void cmpl(GPRRegister reg, const Address &address); | 546 void cmpl(GPRRegister reg, const Address &address); |
| 549 void cmpl(const Address &address, GPRRegister reg); | 547 void cmpl(const Address &address, GPRRegister reg); |
| 550 void cmpl(const Address &address, const Immediate &imm); | 548 void cmpl(const Address &address, const Immediate &imm); |
| 551 void cmpb(const Address &address, const Immediate &imm); | 549 void cmpb(const Address &address, const Immediate &imm); |
| 552 | 550 |
| 553 void testl(GPRRegister reg1, GPRRegister reg2); | 551 void testl(GPRRegister reg1, GPRRegister reg2); |
| 554 void testl(GPRRegister reg, const Immediate &imm); | 552 void testl(GPRRegister reg, const Immediate &imm); |
| 555 | 553 |
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| 575 void adcl(GPRRegister dst, GPRRegister src); | 573 void adcl(GPRRegister dst, GPRRegister src); |
| 576 void adcl(GPRRegister reg, const Immediate &imm); | 574 void adcl(GPRRegister reg, const Immediate &imm); |
| 577 void adcl(GPRRegister dst, const Address &address); | 575 void adcl(GPRRegister dst, const Address &address); |
| 578 void adcl(const Address &dst, GPRRegister src); | 576 void adcl(const Address &dst, GPRRegister src); |
| 579 | 577 |
| 580 void subl(GPRRegister dst, GPRRegister src); | 578 void subl(GPRRegister dst, GPRRegister src); |
| 581 void subl(GPRRegister reg, const Immediate &imm); | 579 void subl(GPRRegister reg, const Immediate &imm); |
| 582 void subl(GPRRegister reg, const Address &address); | 580 void subl(GPRRegister reg, const Address &address); |
| 583 void subl(const Address &address, GPRRegister reg); | 581 void subl(const Address &address, GPRRegister reg); |
| 584 | 582 |
| 583 void cbw(); |
| 584 void cwd(); |
| 585 void cdq(); | 585 void cdq(); |
| 586 | 586 |
| 587 void idivl(GPRRegister reg); | 587 void idivl(GPRRegister reg); |
| 588 | 588 |
| 589 void imull(GPRRegister dst, GPRRegister src); | 589 void imull(GPRRegister dst, GPRRegister src); |
| 590 void imull(GPRRegister reg, const Immediate &imm); | 590 void imull(GPRRegister reg, const Immediate &imm); |
| 591 void imull(GPRRegister reg, const Address &address); | 591 void imull(GPRRegister reg, const Address &address); |
| 592 | 592 |
| 593 void imull(GPRRegister reg); | 593 void imull(GPRRegister reg); |
| 594 void imull(const Address &address); | 594 void imull(const Address &address); |
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| 638 void hlt(); | 638 void hlt(); |
| 639 | 639 |
| 640 void j(CondX86::BrCond condition, Label *label, bool near = kFarJump); | 640 void j(CondX86::BrCond condition, Label *label, bool near = kFarJump); |
| 641 void j(CondX86::BrCond condition, const ConstantRelocatable *label); | 641 void j(CondX86::BrCond condition, const ConstantRelocatable *label); |
| 642 | 642 |
| 643 void jmp(GPRRegister reg); | 643 void jmp(GPRRegister reg); |
| 644 void jmp(Label *label, bool near = kFarJump); | 644 void jmp(Label *label, bool near = kFarJump); |
| 645 void jmp(const ConstantRelocatable *label); | 645 void jmp(const ConstantRelocatable *label); |
| 646 | 646 |
| 647 void lock(); | 647 void lock(); |
| 648 void cmpxchgl(const Address &address, GPRRegister reg); | 648 void cmpxchg(Type Ty, const Address &address, GPRRegister reg); |
| 649 void cmpxchg8b(const Address &address); |
| 650 void xadd(Type Ty, const Address &address, GPRRegister reg); |
| 651 void xchg(Type Ty, const Address &address, GPRRegister reg); |
| 649 | 652 |
| 650 void LockCmpxchgl(const Address &address, GPRRegister reg) { | 653 void LockCmpxchg(Type Ty, const Address &address, GPRRegister reg) { |
| 651 lock(); | 654 lock(); |
| 652 cmpxchgl(address, reg); | 655 cmpxchg(Ty, address, reg); |
| 653 } | 656 } |
| 654 | 657 |
| 655 intptr_t PreferredLoopAlignment() { return 16; } | 658 intptr_t PreferredLoopAlignment() { return 16; } |
| 656 void Align(intptr_t alignment, intptr_t offset); | 659 void Align(intptr_t alignment, intptr_t offset); |
| 657 void Bind(Label *label); | 660 void Bind(Label *label); |
| 658 | 661 |
| 659 intptr_t CodeSize() const { return buffer_.Size(); } | 662 intptr_t CodeSize() const { return buffer_.Size(); } |
| 660 | 663 |
| 661 void FinalizeInstructions(const MemoryRegion ®ion) { | 664 void FinalizeInstructions(const MemoryRegion ®ion) { |
| 662 buffer_.FinalizeInstructions(region); | 665 buffer_.FinalizeInstructions(region); |
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| 715 inline void AssemblerX86::EmitFixup(AssemblerFixup *fixup) { | 718 inline void AssemblerX86::EmitFixup(AssemblerFixup *fixup) { |
| 716 buffer_.EmitFixup(fixup); | 719 buffer_.EmitFixup(fixup); |
| 717 } | 720 } |
| 718 | 721 |
| 719 inline void AssemblerX86::EmitOperandSizeOverride() { EmitUint8(0x66); } | 722 inline void AssemblerX86::EmitOperandSizeOverride() { EmitUint8(0x66); } |
| 720 | 723 |
| 721 } // end of namespace x86 | 724 } // end of namespace x86 |
| 722 } // end of namespace Ice | 725 } // end of namespace Ice |
| 723 | 726 |
| 724 #endif // SUBZERO_SRC_ASSEMBLER_IA32_H_ | 727 #endif // SUBZERO_SRC_ASSEMBLER_IA32_H_ |
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