Handle a few more instructions in assembler (cmov, cdq, cmpxchg, xadd, xchg).

src/IceInstX8632.cpp

 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the InstX8632 and OperandX8632 classes,
@@ skipping 195 matching lines @@
                                    Variable *Eax, Variable *Desired,
                                    bool Locked)
     : InstX8632Lockable(Func, InstX8632::Cmpxchg, 3,
                         llvm::dyn_cast<Variable>(DestOrAddr), Locked) {
   assert(Eax->getRegNum() == RegX8632::Reg_eax);
   addSource(DestOrAddr);
   addSource(Eax);
   addSource(Desired);
 }
 
-InstX8632Cmpxchg8b::InstX8632Cmpxchg8b(Cfg *Func, OperandX8632 *Addr,
+InstX8632Cmpxchg8b::InstX8632Cmpxchg8b(Cfg *Func, OperandX8632Mem *Addr,
                                        Variable *Edx, Variable *Eax,
                                        Variable *Ecx, Variable *Ebx,
                                        bool Locked)
     : InstX8632Lockable(Func, InstX8632::Cmpxchg, 5, NULL, Locked) {
   assert(Edx->getRegNum() == RegX8632::Reg_edx);
   assert(Eax->getRegNum() == RegX8632::Reg_eax);
   assert(Ecx->getRegNum() == RegX8632::Reg_ecx);
   assert(Ebx->getRegNum() == RegX8632::Reg_ebx);
   addSource(Addr);
   addSource(Edx);
@@ skipping 576 matching lines @@
     assert(getDest()->getRegNum() == RegX8632::Reg_edx);
     Str << "\tcwd\n";
     break;
   case IceType_i32:
     assert(getDest()->getRegNum() == RegX8632::Reg_edx);
     Str << "\tcdq\n";
     break;
   }
 }
 
+template <> void InstX8632Cbwdq::emitIAS(const Cfg *Func) const {
+  Ostream &Str = Func->getContext()->getStrEmit();
+  x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+  intptr_t StartPosition = Asm->GetPosition();
+  assert(getSrcSize() == 1);
+  Operand *Src0 = getSrc(0);
+  assert(llvm::isa<Variable>(Src0));
+  assert(llvm::cast<Variable>(Src0)->getRegNum() == RegX8632::Reg_eax);
+  switch (Src0->getType()) {
+  default:
+    llvm_unreachable("unexpected source type!");
+    break;
+  case IceType_i8:
+    assert(getDest()->getRegNum() == RegX8632::Reg_eax);
+    Asm->cbw();
+    break;
+  case IceType_i16:
+    assert(getDest()->getRegNum() == RegX8632::Reg_edx);
+    Asm->cwd();
+    break;
+  case IceType_i32:
+    assert(getDest()->getRegNum() == RegX8632::Reg_edx);
+    Asm->cdq();
+    break;
+  }
+  emitIASBytes(Str, Asm, StartPosition);
+}
+
 void InstX8632Mul::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   assert(llvm::isa<Variable>(getSrc(0)));
   assert(llvm::dyn_cast<Variable>(getSrc(0))->getRegNum() == RegX8632::Reg_eax);
   assert(getDest()->getRegNum() == RegX8632::Reg_eax); // TODO: allow edx?
   Str << "\tmul\t";
   getSrc(1)->emit(Func);
   Str << "\n";
 }
@@ skipping 62 matching lines @@
   Str << "\t";
   assert(Condition != CondX86::Br_None);
   assert(getDest()->hasReg());
   Str << "cmov" << InstX8632BrAttributes[Condition].DisplayString << "\t";
   getDest()->emit(Func);
   Str << ", ";
   getSrc(1)->emit(Func);
   Str << "\n";
 }
 
+void InstX8632Cmov::emitIAS(const Cfg *Func) const {
+  Ostream &Str = Func->getContext()->getStrEmit();
+  Str << "\t";
+  assert(Condition != CondX86::Br_None);
+  assert(getDest()->hasReg());
+  assert(getSrcSize() == 2);
+  // Only need the reg/reg form now.
+  const Variable *Src = llvm::cast<Variable>(getSrc(1));
+  assert(Src->hasReg());
+  assert(Src->getType() == IceType_i32);
+  x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+  intptr_t StartPosition = Asm->GetPosition();
+  Asm->cmov(Condition, RegX8632::getEncodedGPR(getDest()->getRegNum()),
+            RegX8632::getEncodedGPR(Src->getRegNum()));
+  emitIASBytes(Str, Asm, StartPosition);
+}
+
 void InstX8632Cmov::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "cmov" << InstX8632BrAttributes[Condition].DisplayString << ".";
   Str << getDest()->getType() << " ";
   dumpDest(Func);
   Str << ", ";
   dumpSources(Func);
 }
 
 void InstX8632Cmpps::emit(const Cfg *Func) const {
@@ skipping 46 matching lines @@
   if (Locked) {
     Str << "\tlock";
   }
   Str << "\tcmpxchg\t";
   getSrc(0)->emit(Func);
   Str << ", ";
   getSrc(2)->emit(Func);
   Str << "\n";
 }
 
+void InstX8632Cmpxchg::emitIAS(const Cfg *Func) const {
+  Ostream &Str = Func->getContext()->getStrEmit();
+  assert(getSrcSize() == 3);
+  x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+  intptr_t StartPosition = Asm->GetPosition();
+  Type Ty = getSrc(0)->getType();
+  const OperandX8632Mem *Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
+  const x86::Address Addr = Mem->toAsmAddress(Asm);
+  const Variable *VarReg = llvm::cast<Variable>(getSrc(2));
+  assert(VarReg->hasReg());
+  const RegX8632::GPRRegister Reg =
+      RegX8632::getEncodedGPR(VarReg->getRegNum());
+  if (Locked) {
+    Asm->LockCmpxchg(Ty, Addr, Reg);
+  } else {
+    Asm->cmpxchg(Ty, Addr, Reg);
+  }
+  emitIASBytes(Str, Asm, StartPosition);
+}
+
 void InstX8632Cmpxchg::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   if (Locked) {
     Str << "lock ";
   }
   Str << "cmpxchg." << getSrc(0)->getType() << " ";
   dumpSources(Func);
 }
 
 void InstX8632Cmpxchg8b::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 5);
   if (Locked) {
     Str << "\tlock";
   }
   Str << "\tcmpxchg8b\t";
   getSrc(0)->emit(Func);
   Str << "\n";
 }
 
+void InstX8632Cmpxchg8b::emitIAS(const Cfg *Func) const {
+  Ostream &Str = Func->getContext()->getStrEmit();
+  assert(getSrcSize() == 5);
+  x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+  intptr_t StartPosition = Asm->GetPosition();
+  const OperandX8632Mem *Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
+  const x86::Address Addr = Mem->toAsmAddress(Asm);
+  if (Locked) {
+    Asm->lock();
+  }
+  Asm->cmpxchg8b(Addr);
+  emitIASBytes(Str, Asm, StartPosition);
+}
+
 void InstX8632Cmpxchg8b::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   if (Locked) {
     Str << "lock ";
   }
   Str << "cmpxchg8b ";
   dumpSources(Func);
 }
 
 void InstX8632Cvt::emit(const Cfg *Func) const {
@@ skipping 575 matching lines @@
   if (Locked) {
     Str << "\tlock";
   }
   Str << "\txadd\t";
   getSrc(0)->emit(Func);
   Str << ", ";
   getSrc(1)->emit(Func);
   Str << "\n";
 }
 
+void InstX8632Xadd::emitIAS(const Cfg *Func) const {
+  Ostream &Str = Func->getContext()->getStrEmit();
+  assert(getSrcSize() == 2);
+  x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+  intptr_t StartPosition = Asm->GetPosition();
+  Type Ty = getSrc(0)->getType();
+  const OperandX8632Mem *Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
+  const x86::Address Addr = Mem->toAsmAddress(Asm);
+  const Variable *VarReg = llvm::cast<Variable>(getSrc(1));
+  assert(VarReg->hasReg());
+  const RegX8632::GPRRegister Reg =
+      RegX8632::getEncodedGPR(VarReg->getRegNum());
+  if (Locked) {
+    Asm->lock();
+  }
+  Asm->xadd(Ty, Addr, Reg);
+  emitIASBytes(Str, Asm, StartPosition);
+}
+
 void InstX8632Xadd::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   if (Locked) {
     Str << "lock ";
   }
   Type Ty = getSrc(0)->getType();
   Str << "xadd." << Ty << " ";
   dumpSources(Func);
 }
 
 void InstX8632Xchg::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   Str << "\txchg\t";
   getSrc(0)->emit(Func);
   Str << ", ";
   getSrc(1)->emit(Func);
   Str << "\n";
 }
 
+void InstX8632Xchg::emitIAS(const Cfg *Func) const {
+  Ostream &Str = Func->getContext()->getStrEmit();
+  assert(getSrcSize() == 2);
+  x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+  intptr_t StartPosition = Asm->GetPosition();
+  Type Ty = getSrc(0)->getType();
+  const OperandX8632Mem *Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
+  const x86::Address Addr = Mem->toAsmAddress(Asm);
+  const Variable *VarReg = llvm::cast<Variable>(getSrc(1));
+  assert(VarReg->hasReg());
+  const RegX8632::GPRRegister Reg =
+      RegX8632::getEncodedGPR(VarReg->getRegNum());
+  Asm->xchg(Ty, Addr, Reg);
+  emitIASBytes(Str, Asm, StartPosition);
+}
+
 void InstX8632Xchg::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Type Ty = getSrc(0)->getType();
   Str << "xchg." << Ty << " ";
   dumpSources(Func);
 }
 
 void OperandX8632Mem::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   Str << TypeX8632Attributes[getType()].WidthString << " ";
@@ skipping 159 matching lines @@
   }
   Str << "(";
   if (Func)
     Var->dump(Func);
   else
     Var->dump(Str);
   Str << ")";
 }
 
 } // end of namespace Ice