Subzero: Automatically infer regalloc preferences and overlap.

src/IceCfgNode.cpp

 //===- subzero/src/IceCfgNode.cpp - Basic block (node) implementation -----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the CfgNode class, including the complexities
@@ skipping 182 matching lines @@
     CfgNode *Target = *I1;
     // Consider every Phi instruction at the out-edge.
     for (PhiList::const_iterator I2 = Target->Phis.begin(),
                                  E2 = Target->Phis.end();
          I2 != E2; ++I2) {
       Operand *Operand = (*I2)->getOperandForTarget(this);
       assert(Operand);
       Variable *Dest = (*I2)->getDest();
       assert(Dest);
       InstAssign *NewInst = InstAssign::create(Func, Dest, Operand);
-      // If Src is a variable, set the Src and Dest variables to
-      // prefer each other for register allocation.
-      if (Variable *Src = llvm::dyn_cast<Variable>(Operand)) {
-        bool AllowOverlap = false;
-        Dest->setPreferredRegister(Src, AllowOverlap);
-        Src->setPreferredRegister(Dest, AllowOverlap);
-      }
       if (CmpInstDest == Operand)
         Insts.insert(SafeInsertionPoint, NewInst);
       else
         Insts.insert(InsertionPoint, NewInst);
     }
   }
 }
 
 // Deletes the phi instructions after the loads and stores are placed.
 void CfgNode::deletePhis() {
@@ skipping 359 matching lines @@
          I != E; ++I) {
       if (I != OutEdges.begin())
         Str << ", ";
       Str << "%" << (*I)->getName();
     }
     Str << "\n";
   }
 }
 
 } // end of namespace Ice