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Unified Diff: src/compiler/arm/instruction-selector-arm.cc

Issue 596703004: [turbofan] Add backend support for float32. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: REBASE Created 6 years, 3 months ago
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Index: src/compiler/arm/instruction-selector-arm.cc
diff --git a/src/compiler/arm/instruction-selector-arm.cc b/src/compiler/arm/instruction-selector-arm.cc
index a37ebf21df963b2852cfe98599dddc5950f74834..18166347400a1122c30b116476710a54835f7378 100644
--- a/src/compiler/arm/instruction-selector-arm.cc
+++ b/src/compiler/arm/instruction-selector-arm.cc
@@ -49,10 +49,10 @@ class ArmOperandGenerator FINAL : public OperandGenerator {
case kArmRsb:
return ImmediateFitsAddrMode1Instruction(value);
- case kArmVldr32:
- case kArmVstr32:
- case kArmVldr64:
- case kArmVstr64:
+ case kArmVldrF32:
+ case kArmVstrF32:
+ case kArmVldrF64:
+ case kArmVstrF64:
return value >= -1020 && value <= 1020 && (value % 4) == 0;
case kArmLdrb:
@@ -90,6 +90,8 @@ class ArmOperandGenerator FINAL : public OperandGenerator {
case kArmVdivF64:
case kArmVmodF64:
case kArmVnegF64:
+ case kArmVcvtF32F64:
+ case kArmVcvtF64F32:
case kArmVcvtF64S32:
case kArmVcvtF64U32:
case kArmVcvtS32F64:
@@ -290,10 +292,10 @@ void InstructionSelector::VisitLoad(Node* node) {
ArchOpcode opcode;
switch (rep) {
case kRepFloat32:
- opcode = kArmVldr32;
+ opcode = kArmVldrF32;
break;
case kRepFloat64:
- opcode = kArmVldr64;
+ opcode = kArmVldrF64;
break;
case kRepBit: // Fall through.
case kRepWord8:
@@ -345,10 +347,10 @@ void InstructionSelector::VisitStore(Node* node) {
ArchOpcode opcode;
switch (rep) {
case kRepFloat32:
- opcode = kArmVstr32;
+ opcode = kArmVstrF32;
break;
case kRepFloat64:
- opcode = kArmVstr64;
+ opcode = kArmVstrF64;
break;
case kRepBit: // Fall through.
case kRepWord8:
@@ -682,6 +684,13 @@ void InstructionSelector::VisitInt32UMod(Node* node) {
}
+void InstructionSelector::VisitChangeFloat32ToFloat64(Node* node) {
+ ArmOperandGenerator g(this);
+ Emit(kArmVcvtF64F32, g.DefineAsRegister(node),
+ g.UseRegister(node->InputAt(0)));
+}
+
+
void InstructionSelector::VisitChangeInt32ToFloat64(Node* node) {
ArmOperandGenerator g(this);
Emit(kArmVcvtF64S32, g.DefineAsRegister(node),
@@ -710,6 +719,13 @@ void InstructionSelector::VisitChangeFloat64ToUint32(Node* node) {
}
+void InstructionSelector::VisitTruncateFloat64ToFloat32(Node* node) {
+ ArmOperandGenerator g(this);
+ Emit(kArmVcvtF32F64, g.DefineAsRegister(node),
+ g.UseRegister(node->InputAt(0)));
+}
+
+
void InstructionSelector::VisitFloat64Add(Node* node) {
ArmOperandGenerator g(this);
Int32BinopMatcher m(node);

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