OLD | NEW |
1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ | 5 #ifndef V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ |
6 #define V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ | 6 #define V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
(...skipping 45 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
56 V(Arm64Poke) \ | 56 V(Arm64Poke) \ |
57 V(Arm64PokePairZero) \ | 57 V(Arm64PokePairZero) \ |
58 V(Arm64PokePair) \ | 58 V(Arm64PokePair) \ |
59 V(Arm64Float64Cmp) \ | 59 V(Arm64Float64Cmp) \ |
60 V(Arm64Float64Add) \ | 60 V(Arm64Float64Add) \ |
61 V(Arm64Float64Sub) \ | 61 V(Arm64Float64Sub) \ |
62 V(Arm64Float64Mul) \ | 62 V(Arm64Float64Mul) \ |
63 V(Arm64Float64Div) \ | 63 V(Arm64Float64Div) \ |
64 V(Arm64Float64Mod) \ | 64 V(Arm64Float64Mod) \ |
65 V(Arm64Float64Sqrt) \ | 65 V(Arm64Float64Sqrt) \ |
| 66 V(Arm64Float32ToFloat64) \ |
| 67 V(Arm64Float64ToFloat32) \ |
66 V(Arm64Float64ToInt32) \ | 68 V(Arm64Float64ToInt32) \ |
67 V(Arm64Float64ToUint32) \ | 69 V(Arm64Float64ToUint32) \ |
68 V(Arm64Int32ToFloat64) \ | 70 V(Arm64Int32ToFloat64) \ |
69 V(Arm64Uint32ToFloat64) \ | 71 V(Arm64Uint32ToFloat64) \ |
70 V(Arm64LdrS) \ | 72 V(Arm64LdrS) \ |
71 V(Arm64StrS) \ | 73 V(Arm64StrS) \ |
72 V(Arm64LdrD) \ | 74 V(Arm64LdrD) \ |
73 V(Arm64StrD) \ | 75 V(Arm64StrD) \ |
74 V(Arm64Ldrb) \ | 76 V(Arm64Ldrb) \ |
75 V(Arm64Ldrsb) \ | 77 V(Arm64Ldrsb) \ |
(...skipping 23 matching lines...) Expand all Loading... |
99 // MRR = [register + register] | 101 // MRR = [register + register] |
100 #define TARGET_ADDRESSING_MODE_LIST(V) \ | 102 #define TARGET_ADDRESSING_MODE_LIST(V) \ |
101 V(MRI) /* [%r0 + K] */ \ | 103 V(MRI) /* [%r0 + K] */ \ |
102 V(MRR) /* [%r0 + %r1] */ | 104 V(MRR) /* [%r0 + %r1] */ |
103 | 105 |
104 } // namespace internal | 106 } // namespace internal |
105 } // namespace compiler | 107 } // namespace compiler |
106 } // namespace v8 | 108 } // namespace v8 |
107 | 109 |
108 #endif // V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ | 110 #endif // V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ |
OLD | NEW |