Merge (x & y) == 0 pattern to emit a single test instruction.

runtime/vm/stub_code_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/assembler.h"
 #include "vm/code_generator.h"
 #include "vm/compiler.h"
@@ skipping 395 matching lines @@
 //   S4: arguments descriptor array.
 // Note: The receiver object is the first argument to the function being
 //       called, the stub accesses the receiver from this location directly
 //       when trying to resolve the call.
 void StubCode::GenerateInstanceFunctionLookupStub(Assembler* assembler) {
   __ TraceSimMsg("InstanceFunctionLookupStub");
   __ EnterStubFrame();
 
   // Load the receiver.
   __ lw(A1, FieldAddress(S4, ArgumentsDescriptor::count_offset()));
-  __ sll(TMP1, A1, 1);  // A1 is Smi.
-  __ addu(TMP1, FP, TMP1);
-  __ lw(T1, Address(TMP1, kParamEndSlotFromFp * kWordSize));
+  __ sll(TMP, A1, 1);  // A1 is Smi.
+  __ addu(TMP, FP, TMP);
+  __ lw(T1, Address(TMP, kParamEndSlotFromFp * kWordSize));
 
   // Push space for the return value.
   // Push the receiver.
-  // Push TMP1 data object.
+  // Push TMP data object.
   // Push arguments descriptor array.
   __ addiu(SP, SP, Immediate(-4 * kWordSize));
   __ LoadImmediate(TMP, reinterpret_cast<intptr_t>(Object::null()));
   __ sw(TMP, Address(SP, 3 * kWordSize));
   __ sw(T1, Address(SP, 2 * kWordSize));
   __ sw(S5, Address(SP, 1 * kWordSize));
   __ sw(S4, Address(SP, 0 * kWordSize));
 
   // A1: Smi-tagged arguments array length.
   PushArgumentsArray(assembler);
@@ skipping 208 matching lines @@
 // NOTE: A1 cannot be clobbered here as the caller relies on it being saved.
 // The newly allocated object is returned in V0.
 void StubCode::GenerateAllocateArrayStub(Assembler* assembler) {
   __ TraceSimMsg("AllocateArrayStub");
   Label slow_case;
   if (FLAG_inline_alloc) {
     // Compute the size to be allocated, it is based on the array length
     // and is computed as:
     // RoundedAllocationSize((array_length * kwordSize) + sizeof(RawArray)).
     // Assert that length is a Smi.
-    __ andi(CMPRES, A1, Immediate(kSmiTagMask));
+    __ andi(CMPRES1, A1, Immediate(kSmiTagMask));
     if (FLAG_use_slow_path) {
       __ b(&slow_case);
     } else {
-      __ bne(CMPRES, ZR, &slow_case);
+      __ bne(CMPRES1, ZR, &slow_case);
     }
     __ lw(T0, FieldAddress(CTX, Context::isolate_offset()));
     __ lw(T0, Address(T0, Isolate::heap_offset()));
     __ lw(T0, Address(T0, Heap::new_space_offset()));
 
     // Calculate and align allocation size.
     // Load new object start and calculate next object start.
     // A0: array element type.
     // A1: Array length as Smi.
     // T0: Points to new space object.
     __ lw(V0, Address(T0, Scavenger::top_offset()));
     intptr_t fixed_size = sizeof(RawArray) + kObjectAlignment - 1;
     __ LoadImmediate(T3, fixed_size);
-    __ sll(TMP1, A1, 1);  // A1 is Smi.
-    __ addu(T3, T3, TMP1);
+    __ sll(TMP, A1, 1);  // A1 is Smi.
+    __ addu(T3, T3, TMP);
     ASSERT(kSmiTagShift == 1);
-    __ LoadImmediate(TMP1, ~(kObjectAlignment - 1));
-    __ and_(T3, T3, TMP1);
+    __ LoadImmediate(TMP, ~(kObjectAlignment - 1));
+    __ and_(T3, T3, TMP);
     __ addu(T2, T3, V0);
 
     // Check if the allocation fits into the remaining space.
     // V0: potential new object start.
     // A0: array element type.
     // A1: array length as Smi.
     // T0: points to new space object.
     // T2: potential next object start.
     // T3: array size.
     __ lw(CMPRES1, Address(T0, Scavenger::end_offset()));
@@ skipping 25 matching lines @@
         A1);
 
     // Calculate the size tag.
     // V0: new object start as a tagged pointer.
     // A1: Array length as Smi.
     // T2: new object end address.
     // T3: array size.
     const intptr_t shift = RawObject::kSizeTagBit - kObjectAlignmentLog2;
     // If no size tag overflow, shift T3 left, else set T3 to zero.
     __ LoadImmediate(T4, RawObject::SizeTag::kMaxSizeTag);
-    __ sltu(CMPRES, T4, T3);  // CMPRES = T4 < T3 ? 1 : 0
-    __ sll(TMP1, T3, shift);  // TMP1 = T3 << shift;
-    __ movz(T3, TMP1, CMPRES);  // T3 = T4 >= T3 ? 0 : T3
-    __ movn(T3, ZR, CMPRES);  // T3 = T4 < T3 ? TMP1 : T3
+    __ sltu(CMPRES1, T4, T3);  // CMPRES1 = T4 < T3 ? 1 : 0
+    __ sll(TMP, T3, shift);  // TMP = T3 << shift;
+    __ movz(T3, TMP, CMPRES1);  // T3 = T4 >= T3 ? 0 : T3
+    __ movn(T3, ZR, CMPRES1);  // T3 = T4 < T3 ? TMP : T3
 
     // Get the class index and insert it into the tags.
-    __ LoadImmediate(TMP1, RawObject::ClassIdTag::encode(kArrayCid));
-    __ or_(T3, T3, TMP1);
+    __ LoadImmediate(TMP, RawObject::ClassIdTag::encode(kArrayCid));
+    __ or_(T3, T3, TMP);
     __ sw(T3, FieldAddress(V0, Array::tags_offset()));
 
     // Initialize all array elements to raw_null.
     // V0: new object start as a tagged pointer.
     // T2: new object end address.
     // A1: Array length as Smi.
     __ AddImmediate(T3, V0, Array::data_offset() - kHeapObjectTag);
     // T3: iterator which initially points to the start of the variable
     // data area to be initialized.
 
@@ skipping 42 matching lines @@
 //   SP: address of last argument.
 //   S4: Arguments descriptor array.
 // Return: V0.
 // Note: The closure object is the first argument to the function being
 //       called, the stub accesses the closure from this location directly
 //       when trying to resolve the call.
 void StubCode::GenerateCallClosureFunctionStub(Assembler* assembler) {
   // Load num_args.
   __ TraceSimMsg("GenerateCallClosureFunctionStub");
   __ lw(T0, FieldAddress(S4, ArgumentsDescriptor::count_offset()));
-  __ LoadImmediate(TMP1, Smi::RawValue(1));
-  __ subu(T0, T0, TMP1);
+  __ LoadImmediate(TMP, Smi::RawValue(1));
+  __ subu(T0, T0, TMP);
 
   // Load closure object in T1.
   __ sll(T1, T0, 1);  // T0 (num_args - 1) is a Smi.
   __ addu(T1, SP, T1);
   __ lw(T1, Address(T1));
 
   // Verify that T1 is a closure by checking its class.
   Label not_closure;
 
   __ LoadImmediate(T7, reinterpret_cast<intptr_t>(Object::null()));
 
   // See if it is not a closure, but null object.
   __ beq(T1, T7, &not_closure);
 
-  __ andi(CMPRES, T1, Immediate(kSmiTagMask));
-  __ beq(CMPRES, ZR, &not_closure);  // Not a closure, but a smi.
+  __ andi(CMPRES1, T1, Immediate(kSmiTagMask));
+  __ beq(CMPRES1, ZR, &not_closure);  // Not a closure, but a smi.
 
   // Verify that the class of the object is a closure class by checking that
   // class.signature_function() is not null.
   __ LoadClass(T0, T1);
   __ lw(T0, FieldAddress(T0, Class::signature_function_offset()));
 
   // See if actual class is not a closure class.
   __ beq(T0, T7, &not_closure);
 
   // T0 is just the signature function. Load the actual closure function.
@@ skipping 247 matching lines @@
     // T2: object size.
     __ LoadImmediate(T5, heap->TopAddress());
     __ lw(V0, Address(T5, 0));
     __ addu(T3, T2, V0);
 
     // Check if the allocation fits into the remaining space.
     // V0: potential new object.
     // T1: number of context variables.
     // T2: object size.
     // T3: potential next object start.
-    __ LoadImmediate(TMP1, heap->EndAddress());
-    __ lw(CMPRES1, Address(TMP1, 0));
+    __ LoadImmediate(TMP, heap->EndAddress());
+    __ lw(CMPRES1, Address(TMP, 0));
     if (FLAG_use_slow_path) {
       __ b(&slow_case);
     } else {
       __ BranchUnsignedGreaterEqual(T3, CMPRES1, &slow_case);
     }
 
     // Successfully allocated the object, now update top to point to
     // next object start and initialize the object.
     // V0: new object.
     // T1: number of context variables.
     // T2: object size.
     // T3: next object start.
     __ sw(T3, Address(T5, 0));
     __ addiu(V0, V0, Immediate(kHeapObjectTag));
 
     // Calculate the size tag.
     // V0: new object.
     // T1: number of context variables.
     // T2: object size.
     const intptr_t shift = RawObject::kSizeTagBit - kObjectAlignmentLog2;
-    __ LoadImmediate(TMP1, RawObject::SizeTag::kMaxSizeTag);
-    __ sltu(CMPRES, TMP1, T2);  // CMPRES = T2 > TMP1 ? 1 : 0.
-    __ movn(T2, ZR, CMPRES);  // T2 = CMPRES != 0 ? 0 : T2.
-    __ sll(TMP1, T2, shift);  // TMP1 = T2 << shift.
-    __ movz(T2, TMP1, CMPRES);  // T2 = CMPRES == 0 ? TMP1 : T2.
+    __ LoadImmediate(TMP, RawObject::SizeTag::kMaxSizeTag);
+    __ sltu(CMPRES1, TMP, T2);  // CMPRES1 = T2 > TMP ? 1 : 0.
+    __ movn(T2, ZR, CMPRES1);  // T2 = CMPRES1 != 0 ? 0 : T2.
+    __ sll(TMP, T2, shift);  // TMP = T2 << shift.
+    __ movz(T2, TMP, CMPRES1);  // T2 = CMPRES1 == 0 ? TMP : T2.
 
     // Get the class index and insert it into the tags.
     // T2: size and bit tags.
-    __ LoadImmediate(TMP1, RawObject::ClassIdTag::encode(context_class.id()));
-    __ or_(T2, T2, TMP1);
+    __ LoadImmediate(TMP, RawObject::ClassIdTag::encode(context_class.id()));
+    __ or_(T2, T2, TMP);
     __ sw(T2, FieldAddress(V0, Context::tags_offset()));
 
     // Setup up number of context variables field.
     // V0: new object.
     // T1: number of context variables as integer value (not object).
     __ sw(T1, FieldAddress(V0, Context::num_variables_offset()));
 
     // Setup isolate field.
     // Load Isolate pointer from Context structure into R2.
     // V0: new object.
@@ skipping 58 matching lines @@
   __ sw(T3, Address(SP, 2 * kWordSize));
   __ sw(T2, Address(SP, 1 * kWordSize));
   __ sw(T1, Address(SP, 0 * kWordSize));
 
   Label add_to_buffer;
   // Check whether this object has already been remembered. Skip adding to the
   // store buffer if the object is in the store buffer already.
   // Spilled: T1, T2, T3.
   // T0: Address being stored.
   __ lw(T2, FieldAddress(T0, Object::tags_offset()));
-  __ andi(CMPRES, T2, Immediate(1 << RawObject::kRememberedBit));
-  __ beq(CMPRES, ZR, &add_to_buffer);
+  __ andi(CMPRES1, T2, Immediate(1 << RawObject::kRememberedBit));
+  __ beq(CMPRES1, ZR, &add_to_buffer);
   __ lw(T1, Address(SP, 0 * kWordSize));
   __ lw(T2, Address(SP, 1 * kWordSize));
   __ lw(T3, Address(SP, 2 * kWordSize));
   __ addiu(SP, SP, Immediate(3 * kWordSize));
   __ Ret();
 
   __ Bind(&add_to_buffer);
   __ ori(T2, T2, Immediate(1 << RawObject::kRememberedBit));
   __ sw(T2, FieldAddress(T0, Object::tags_offset()));
 
@@ skipping 10 matching lines @@
   __ sll(T3, T2, 2);
   __ addu(T3, T1, T3);
   __ sw(T0, Address(T3, StoreBufferBlock::pointers_offset()));
 
   // Increment top_ and check for overflow.
   // T2: top_
   // T1: StoreBufferBlock
   Label L;
   __ addiu(T2, T2, Immediate(1));
   __ sw(T2, Address(T1, StoreBufferBlock::top_offset()));
-  __ addiu(CMPRES, T2, Immediate(-StoreBufferBlock::kSize));
+  __ addiu(CMPRES1, T2, Immediate(-StoreBufferBlock::kSize));
   // Restore values.
   __ lw(T1, Address(SP, 0 * kWordSize));
   __ lw(T2, Address(SP, 1 * kWordSize));
   __ lw(T3, Address(SP, 2 * kWordSize));
-  __ beq(CMPRES, ZR, &L);
+  __ beq(CMPRES1, ZR, &L);
   __ delay_slot()->addiu(SP, SP, Immediate(3 * kWordSize));
   __ Ret();
 
   // Handle overflow: Call the runtime leaf function.
   __ Bind(&L);
   // Setup frame, push callee-saved registers.
 
   __ EnterCallRuntimeFrame(1 * kWordSize);
   __ lw(A0, FieldAddress(CTX, Context::isolate_offset()));
   __ CallRuntime(kStoreBufferBlockProcessRuntimeEntry, 1);
@@ skipping 41 matching lines @@
                      &no_instantiator);
       __ delay_slot()->mov(T4, T3);
       __ AddImmediate(T3, type_args_size);
       __ Bind(&no_instantiator);
       // T4: potential new object end and, if T4 != T3, potential new
       // InstantiatedTypeArguments object start.
     }
     // Check if the allocation fits into the remaining space.
     // T2: potential new object start.
     // T3: potential next object start.
-    __ LoadImmediate(TMP1, heap->EndAddress());
-    __ lw(CMPRES1, Address(TMP1));
+    __ LoadImmediate(TMP, heap->EndAddress());
+    __ lw(CMPRES1, Address(TMP));
     if (FLAG_use_slow_path) {
       __ b(&slow_case);
     } else {
       __ BranchUnsignedGreaterEqual(T3, CMPRES1, &slow_case);
     }
 
     // Successfully allocated the object(s), now update top to point to
     // next object start and initialize the object.
     __ sw(T3, Address(T5));
 
@@ skipping 81 matching lines @@
 
     __ Bind(&slow_case);
   }
   if (is_cls_parameterized) {
     __ lw(T1, Address(SP, 1 * kWordSize));
     __ lw(T0, Address(SP, 0 * kWordSize));
   }
   // Create a stub frame as we are pushing some objects on the stack before
   // calling into the runtime.
   __ EnterStubFrame(true);  // Uses pool pointer to pass cls to runtime.
-  __ LoadObject(TMP1, cls);
+  __ LoadObject(TMP, cls);
 
   __ addiu(SP, SP, Immediate(-4 * kWordSize));
   // Space on stack for return value.
   __ LoadImmediate(T7, reinterpret_cast<intptr_t>(Object::null()));
   __ sw(T7, Address(SP, 3 * kWordSize));
-  __ sw(TMP1, Address(SP, 2 * kWordSize));  // Class of object to be allocated.
+  __ sw(TMP, Address(SP, 2 * kWordSize));  // Class of object to be allocated.
 
   if (is_cls_parameterized) {
     // Push type arguments of object to be allocated and of instantiator.
     __ sw(T1, Address(SP, 1 * kWordSize));
     __ sw(T0, Address(SP, 0 * kWordSize));
   } else {
     // Push null type arguments and kNoInstantiator.
     __ LoadImmediate(T1, Smi::RawValue(StubCode::kNoInstantiator));
     __ sw(T7, Address(SP, 1 * kWordSize));
     __ sw(T1, Address(SP, 0 * kWordSize));
@@ skipping 37 matching lines @@
     __ lw(T2, Address(T5));
     __ AddImmediate(T3, T2, closure_size);
     if (is_implicit_instance_closure) {
       __ mov(T4, T3);  // T4: new context address.
       __ AddImmediate(T3, context_size);
     }
     // Check if the allocation fits into the remaining space.
     // T2: potential new closure object.
     // T3: address of top of heap.
     // T4: potential new context object (only if is_implicit_closure).
-    __ LoadImmediate(TMP1, heap->EndAddress());
-    __ lw(CMPRES1, Address(TMP1));
+    __ LoadImmediate(TMP, heap->EndAddress());
+    __ lw(CMPRES1, Address(TMP));
     if (FLAG_use_slow_path) {
       __ b(&slow_case);
     } else {
       __ BranchUnsignedGreaterEqual(T3, CMPRES1, &slow_case);
     }
 
     // Successfully allocated the object, now update top to point to
     // next object start and initialize the object.
     __ sw(T3, Address(T5));
 
@@ skipping 58 matching lines @@
 
     __ Bind(&slow_case);
   }
 
   // If it's an implicit instance closure we need 4 stack slots, o/w only 3.
   intptr_t num_slots = is_implicit_instance_closure ? 4 : 3;
   __ addiu(SP, SP, Immediate(-num_slots * kWordSize));
   // Setup space on stack for return value.
   __ LoadImmediate(T7, reinterpret_cast<intptr_t>(Object::null()));
   __ sw(T7, Address(SP, (num_slots - 1) * kWordSize));
-  __ LoadObject(TMP1, func);
-  __ sw(TMP1, Address(SP, (num_slots - 2) * kWordSize));
+  __ LoadObject(TMP, func);
+  __ sw(TMP, Address(SP, (num_slots - 2) * kWordSize));
   __ mov(T2, T7);
   if (is_implicit_instance_closure) {
     __ lw(T1, Address(FP, kReceiverFPOffset));
     __ sw(T1, Address(SP, (num_slots - 3) * kWordSize));  // Receiver.
   }
   if (has_type_arguments) {
     __ lw(T2, Address(FP, kTypeArgumentsFPOffset));
   }
   __ sw(T2, Address(SP, 0 * kWordSize));
 
@@ skipping 144 matching lines @@
   Label loop, update, test, found, get_class_id_as_smi;
   // S5: IC data object (preserved).
   __ lw(T0, FieldAddress(S5, ICData::ic_data_offset()));
   // T0: ic_data_array with check entries: classes and target functions.
   __ AddImmediate(T0, Array::data_offset() - kHeapObjectTag);
   // T0: points directly to the first ic data array element.
 
   // Get the receiver's class ID (first read number of arguments from
   // arguments descriptor array and then access the receiver from the stack).
   __ lw(T1, FieldAddress(S4, ArgumentsDescriptor::count_offset()));
-  __ LoadImmediate(TMP1, Smi::RawValue(1));
-  __ subu(T1, T1, TMP1);
+  __ LoadImmediate(TMP, Smi::RawValue(1));
+  __ subu(T1, T1, TMP);
   __ sll(T3, T1, 1);  // T1 (argument_count - 1) is smi.
   __ addu(T3, T3, SP);
   __ bal(&get_class_id_as_smi);
   __ delay_slot()->lw(T3, Address(T3));
   // T1: argument_count - 1 (smi).
   // T3: receiver's class ID (smi).
   __ b(&test);
   __ delay_slot()->lw(T4, Address(T0));  // First class id (smi) to check.
 
   __ Bind(&loop);
@@ skipping 53 matching lines @@
   // Preserve IC data object and arguments descriptor array and
   // setup space on stack for result (target code object).
   int num_slots = num_args + 4;
   __ addiu(SP, SP, Immediate(-num_slots * kWordSize));
   __ sw(S5, Address(SP, (num_slots - 1) * kWordSize));
   __ sw(S4, Address(SP, (num_slots - 2) * kWordSize));
   __ LoadImmediate(TMP, reinterpret_cast<intptr_t>(Object::null()));
   __ sw(TMP, Address(SP, (num_slots - 3) * kWordSize));
   // Push call arguments.
   for (intptr_t i = 0; i < num_args; i++) {
-    __ lw(TMP1, Address(T1, -i * kWordSize));
-    __ sw(TMP1, Address(SP, (num_slots - i - 4) * kWordSize));
+    __ lw(TMP, Address(T1, -i * kWordSize));
+    __ sw(TMP, Address(SP, (num_slots - i - 4) * kWordSize));
   }
   // Pass IC data object.
   __ sw(S5, Address(SP, (num_slots - num_args - 4) * kWordSize));
   __ CallRuntime(handle_ic_miss, num_args + 1);
   __ TraceSimMsg("NArgsCheckInlineCacheStub return");
   // Pop returned code object into T3 (null if not found).
   // Restore arguments descriptor array and IC data array.
   __ lw(T3, Address(SP, (num_slots - 3) * kWordSize));
   __ lw(S4, Address(SP, (num_slots - 2) * kWordSize));
   __ lw(S5, Address(SP, (num_slots - 1) * kWordSize));
@@ skipping 505 matching lines @@
 
 
 DECLARE_LEAF_RUNTIME_ENTRY(intptr_t,
                            BigintCompare,
                            RawBigint* left,
                            RawBigint* right);
 
 
 // Does identical check (object references are equal or not equal) with special
 // checks for boxed numbers.
-// Returns: CMPRES is zero if equal, non-zero otherwise.
+// Returns: CMPRES1 is zero if equal, non-zero otherwise.
 // Note: A Mint cannot contain a value that would fit in Smi, a Bigint
 // cannot contain a value that fits in Mint or Smi.
 void StubCode::GenerateIdenticalWithNumberCheckStub(Assembler* assembler,
                                                     const Register left,
                                                     const Register right,
                                                     const Register temp1,
                                                     const Register temp2) {
   __ TraceSimMsg("IdenticalWithNumberCheckStub");
   __ Comment("IdenticalWithNumberCheckStub");
   Label reference_compare, done, check_mint, check_bigint;
   // If any of the arguments is Smi do reference compare.
   __ andi(temp1, left, Immediate(kSmiTagMask));
   __ beq(temp1, ZR, &reference_compare);
   __ andi(temp1, right, Immediate(kSmiTagMask));
   __ beq(temp1, ZR, &reference_compare);
 
   // Value compare for two doubles.
   __ LoadImmediate(temp1, kDoubleCid);
   __ LoadClassId(temp2, left);
   __ bne(temp1, temp2, &check_mint);
   __ LoadClassId(temp2, right);
-  __ subu(CMPRES, temp1, temp2);
-  __ bne(CMPRES, ZR, &done);
+  __ subu(CMPRES1, temp1, temp2);
+  __ bne(CMPRES1, ZR, &done);
 
   // Double values bitwise compare.
   __ lw(temp1, FieldAddress(left, Double::value_offset() + 0 * kWordSize));
   __ lw(temp2, FieldAddress(right, Double::value_offset() + 0 * kWordSize));
-  __ subu(CMPRES, temp1, temp2);
-  __ bne(CMPRES, ZR, &done);
+  __ subu(CMPRES1, temp1, temp2);
+  __ bne(CMPRES1, ZR, &done);
   __ lw(temp1, FieldAddress(left, Double::value_offset() + 1 * kWordSize));
   __ lw(temp2, FieldAddress(right, Double::value_offset() + 1 * kWordSize));
   __ b(&done);
-  __ delay_slot()->subu(CMPRES, temp1, temp2);
+  __ delay_slot()->subu(CMPRES1, temp1, temp2);
 
   __ Bind(&check_mint);
   __ LoadImmediate(temp1, kMintCid);
   __ LoadClassId(temp2, left);
   __ bne(temp1, temp2, &check_bigint);
   __ LoadClassId(temp2, right);
-  __ subu(CMPRES, temp1, temp2);
-  __ bne(CMPRES, ZR, &done);
+  __ subu(CMPRES1, temp1, temp2);
+  __ bne(CMPRES1, ZR, &done);
 
   __ lw(temp1, FieldAddress(left, Mint::value_offset() + 0 * kWordSize));
   __ lw(temp2, FieldAddress(right, Mint::value_offset() + 0 * kWordSize));
-  __ subu(CMPRES, temp1, temp2);
-  __ bne(CMPRES, ZR, &done);
+  __ subu(CMPRES1, temp1, temp2);
+  __ bne(CMPRES1, ZR, &done);
   __ lw(temp1, FieldAddress(left, Mint::value_offset() + 1 * kWordSize));
   __ lw(temp2, FieldAddress(right, Mint::value_offset() + 1 * kWordSize));
   __ b(&done);
-  __ delay_slot()->subu(CMPRES, temp1, temp2);
+  __ delay_slot()->subu(CMPRES1, temp1, temp2);
 
   __ Bind(&check_bigint);
   __ LoadImmediate(temp1, kBigintCid);
   __ LoadClassId(temp2, left);
   __ bne(temp1, temp2, &reference_compare);
   __ LoadClassId(temp2, right);
-  __ subu(CMPRES, temp1, temp2);
-  __ bne(CMPRES, ZR, &done);
+  __ subu(CMPRES1, temp1, temp2);
+  __ bne(CMPRES1, ZR, &done);
 
   __ EnterStubFrame();
   __ ReserveAlignedFrameSpace(2 * kWordSize);
   __ sw(left, Address(SP, 1 * kWordSize));
   __ sw(right, Address(SP, 0 * kWordSize));
   __ mov(A0, left);
   __ mov(A1, right);
   __ CallRuntime(kBigintCompareRuntimeEntry, 2);
   __ TraceSimMsg("IdenticalWithNumberCheckStub return");
   // Result in V0, 0 means equal.
   __ LeaveStubFrame();
   __ b(&done);
-  __ delay_slot()->mov(CMPRES, V0);
+  __ delay_slot()->mov(CMPRES1, V0);
 
   __ Bind(&reference_compare);
-  __ subu(CMPRES, left, right);
+  __ subu(CMPRES1, left, right);
   __ Bind(&done);
   // A branch or test after this comparison will check CMPRES1 == CMPRES2.
   __ mov(CMPRES2, ZR);
 }
 
 
 // Called only from unoptimized code. All relevant registers have been saved.
 // RA: return address.
 // SP + 4: left operand.
 // SP + 0: right operand.
-// Returns: CMPRES is zero if equal, non-zero otherwise.
+// Returns: CMPRES1 is zero if equal, non-zero otherwise.
 void StubCode::GenerateUnoptimizedIdenticalWithNumberCheckStub(
     Assembler* assembler) {
   // Check single stepping.
   Label not_stepping;
   __ lw(T0, FieldAddress(CTX, Context::isolate_offset()));
   __ lbu(T0, Address(T0, Isolate::single_step_offset()));
   __ BranchEqual(T0, 0, &not_stepping);
   // Call single step callback in debugger.
   __ addiu(SP, SP, Immediate(-1 * kWordSize));
   __ sw(RA, Address(SP, 0 * kWordSize));  // Return address.
@@ skipping 11 matching lines @@
   __ lw(right, Address(SP, 0 * kWordSize));
   GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2);
   __ Ret();
 }
 
 
 // Called from otpimzied code only. Must preserve any registers that are
 // destroyed.
 // SP + 4: left operand.
 // SP + 0: right operand.
-// Returns: CMPRES is zero if equal, non-zero otherwise.
+// Returns: CMPRES1 is zero if equal, non-zero otherwise.
 void StubCode::GenerateOptimizedIdenticalWithNumberCheckStub(
     Assembler* assembler) {
   const Register temp1 = T2;
   const Register temp2 = T3;
   const Register left = T1;
   const Register right = T0;
   // Preserve left, right.
   __ addiu(SP, SP, Immediate(-4 * kWordSize));
   __ sw(temp1, Address(SP, 3 * kWordSize));
   __ sw(temp2, Address(SP, 2 * kWordSize));
   __ sw(left, Address(SP, 1 * kWordSize));
   __ sw(right, Address(SP, 0 * kWordSize));
   __ lw(left, Address(SP, 5 * kWordSize));
   __ lw(right, Address(SP, 4 * kWordSize));
   GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2);
   __ lw(right, Address(SP, 0 * kWordSize));
   __ lw(left, Address(SP, 1 * kWordSize));
   __ lw(temp2, Address(SP, 2 * kWordSize));
   __ lw(temp1, Address(SP, 3 * kWordSize));
   __ Ret();
   __ delay_slot()->addiu(SP, SP, Immediate(4 * kWordSize));
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS