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Side by Side Diff: runtime/vm/instructions_mips.cc

Issue 59613005: Merge (x & y) == 0 pattern to emit a single test instruction. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 7 years, 1 month ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_MIPS. 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_MIPS.
6 #if defined(TARGET_ARCH_MIPS) 6 #if defined(TARGET_ARCH_MIPS)
7 7
8 #include "vm/constants_mips.h" 8 #include "vm/constants_mips.h"
9 #include "vm/cpu.h" 9 #include "vm/cpu.h"
10 #include "vm/instructions.h" 10 #include "vm/instructions.h"
(...skipping 162 matching lines...) Expand 10 before | Expand all | Expand 10 after
173 173
174 174
175 void CallPattern::InsertAt(uword pc, uword target_address) { 175 void CallPattern::InsertAt(uword pc, uword target_address) {
176 Instr* lui = Instr::At(pc + (0 * Instr::kInstrSize)); 176 Instr* lui = Instr::At(pc + (0 * Instr::kInstrSize));
177 Instr* ori = Instr::At(pc + (1 * Instr::kInstrSize)); 177 Instr* ori = Instr::At(pc + (1 * Instr::kInstrSize));
178 Instr* jr = Instr::At(pc + (2 * Instr::kInstrSize)); 178 Instr* jr = Instr::At(pc + (2 * Instr::kInstrSize));
179 Instr* nop = Instr::At(pc + (3 * Instr::kInstrSize)); 179 Instr* nop = Instr::At(pc + (3 * Instr::kInstrSize));
180 uint16_t target_lo = target_address & 0xffff; 180 uint16_t target_lo = target_address & 0xffff;
181 uint16_t target_hi = target_address >> 16; 181 uint16_t target_hi = target_address >> 16;
182 182
183 lui->SetImmInstrBits(LUI, ZR, TMP1, target_hi); 183 lui->SetImmInstrBits(LUI, ZR, TMP, target_hi);
184 ori->SetImmInstrBits(ORI, TMP1, TMP1, target_lo); 184 ori->SetImmInstrBits(ORI, TMP, TMP, target_lo);
185 jr->SetSpecialInstrBits(JALR, TMP1, ZR, RA); 185 jr->SetSpecialInstrBits(JALR, TMP, ZR, RA);
186 nop->SetInstructionBits(Instr::kNopInstruction); 186 nop->SetInstructionBits(Instr::kNopInstruction);
187 187
188 ASSERT(kFixedLengthInBytes == 4 * Instr::kInstrSize); 188 ASSERT(kFixedLengthInBytes == 4 * Instr::kInstrSize);
189 CPU::FlushICache(pc, kFixedLengthInBytes); 189 CPU::FlushICache(pc, kFixedLengthInBytes);
190 } 190 }
191 191
192 192
193 JumpPattern::JumpPattern(uword pc, const Code& code) : pc_(pc) { } 193 JumpPattern::JumpPattern(uword pc, const Code& code) : pc_(pc) { }
194 194
195 195
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223 const uint16_t target_lo = target_address & 0xffff; 223 const uint16_t target_lo = target_address & 0xffff;
224 const uint16_t target_hi = target_address >> 16; 224 const uint16_t target_hi = target_address >> 16;
225 225
226 lui->SetInstructionBits((lui_bits & 0xffff0000) | target_hi); 226 lui->SetInstructionBits((lui_bits & 0xffff0000) | target_hi);
227 ori->SetInstructionBits((ori_bits & 0xffff0000) | target_lo); 227 ori->SetInstructionBits((ori_bits & 0xffff0000) | target_lo);
228 } 228 }
229 229
230 } // namespace dart 230 } // namespace dart
231 231
232 #endif // defined TARGET_ARCH_MIPS 232 #endif // defined TARGET_ARCH_MIPS
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