Merge (x & y) == 0 pattern to emit a single test instruction.

runtime/vm/flow_graph_compiler_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_MIPS.
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/flow_graph_compiler.h"
 
 #include "vm/ast_printer.h"
@@ skipping 212 matching lines @@
   __ Comment("InstantiatedTypeWithArgumentsTest");
   ASSERT(type.IsInstantiated());
   const Class& type_class = Class::ZoneHandle(type.type_class());
   ASSERT((type_class.NumTypeArguments() > 0) || type_class.IsSignatureClass());
   const Register kInstanceReg = A0;
   Error& malformed_error = Error::Handle();
   const Type& int_type = Type::Handle(Type::IntType());
   const bool smi_is_ok = int_type.IsSubtypeOf(type, &malformed_error);
   // Malformed type should have been handled at graph construction time.
   ASSERT(smi_is_ok || malformed_error.IsNull());
-  __ andi(CMPRES, kInstanceReg, Immediate(kSmiTagMask));
+  __ andi(CMPRES1, kInstanceReg, Immediate(kSmiTagMask));
   if (smi_is_ok) {
-    __ beq(CMPRES, ZR, is_instance_lbl);
+    __ beq(CMPRES1, ZR, is_instance_lbl);
   } else {
-    __ beq(CMPRES, ZR, is_not_instance_lbl);
+    __ beq(CMPRES1, ZR, is_not_instance_lbl);
   }
   const AbstractTypeArguments& type_arguments =
       AbstractTypeArguments::ZoneHandle(type.arguments());
   const bool is_raw_type = type_arguments.IsNull() ||
       type_arguments.IsRaw(type_arguments.Length());
   // Signature class is an instantiated parameterized type.
   if (!type_class.IsSignatureClass()) {
     if (is_raw_type) {
       const Register kClassIdReg = T0;
       // dynamic type argument, check only classes.
@@ skipping 173 matching lines @@
         FieldAddress(A1, TypeArguments::type_at_offset(type_param.index())));
     // R2: concrete type of type.
     // Check if type argument is dynamic.
     __ BranchEqual(T2, Type::ZoneHandle(Type::DynamicType()), is_instance_lbl);
     __ beq(T2, T7, is_instance_lbl);
     const Type& object_type = Type::ZoneHandle(Type::ObjectType());
     __ BranchEqual(T2, object_type, is_instance_lbl);
 
     // For Smi check quickly against int and num interfaces.
     Label not_smi;
-    __ andi(CMPRES, A0, Immediate(kSmiTagMask));
-    __ bne(CMPRES, ZR, &not_smi);  // Value is Smi?
+    __ andi(CMPRES1, A0, Immediate(kSmiTagMask));
+    __ bne(CMPRES1, ZR, &not_smi);  // Value is Smi?
     __ BranchEqual(T2, Type::ZoneHandle(Type::IntType()), is_instance_lbl);
     __ BranchEqual(T2, Type::ZoneHandle(Type::Number()), is_instance_lbl);
 
     // Smi must be handled in runtime.
     __ b(&fall_through);
 
     __ Bind(&not_smi);
     // T1: instantiator type arguments.
     // A0: instance.
     const Register kInstanceReg = A0;
     const Register kTypeArgumentsReg = A1;
     const Register kTempReg = kNoRegister;
     const SubtypeTestCache& type_test_cache =
         SubtypeTestCache::ZoneHandle(
             GenerateCallSubtypeTestStub(kTestTypeThreeArgs,
                                         kInstanceReg,
                                         kTypeArgumentsReg,
                                         kTempReg,
                                         is_instance_lbl,
                                         is_not_instance_lbl));
     __ Bind(&fall_through);
     return type_test_cache.raw();
   }
   if (type.IsType()) {
     const Register kInstanceReg = A0;
     const Register kTypeArgumentsReg = A1;
-    __ andi(CMPRES, kInstanceReg, Immediate(kSmiTagMask));
-    __ beq(CMPRES, ZR, is_not_instance_lbl);  // Is instance Smi?
+    __ andi(CMPRES1, kInstanceReg, Immediate(kSmiTagMask));
+    __ beq(CMPRES1, ZR, is_not_instance_lbl);  // Is instance Smi?
     __ lw(kTypeArgumentsReg, Address(SP, 0));  // Instantiator type args.
     // Uninstantiated type class is known at compile time, but the type
     // arguments are determined at runtime by the instantiator.
     const Register kTempReg = kNoRegister;
     return GenerateCallSubtypeTestStub(kTestTypeThreeArgs,
                                        kInstanceReg,
                                        kTypeArgumentsReg,
                                        kTempReg,
                                        is_instance_lbl,
                                        is_not_instance_lbl);
@@ skipping 19 matching lines @@
   __ TraceSimMsg("InlineInstanceof");
   __ Comment("InlineInstanceof");
   if (type.IsVoidType()) {
     // A non-null value is returned from a void function, which will result in a
     // type error. A null value is handled prior to executing this inline code.
     return SubtypeTestCache::null();
   }
   if (TypeCheckAsClassEquality(type)) {
     const intptr_t type_cid = Class::Handle(type.type_class()).id();
     const Register kInstanceReg = A0;
-    __ andi(CMPRES, kInstanceReg, Immediate(kSmiTagMask));
+    __ andi(CMPRES1, kInstanceReg, Immediate(kSmiTagMask));
     if (type_cid == kSmiCid) {
-      __ beq(CMPRES, ZR, is_instance_lbl);
+      __ beq(CMPRES1, ZR, is_instance_lbl);
     } else {
-      __ beq(CMPRES, ZR, is_not_instance_lbl);
+      __ beq(CMPRES1, ZR, is_not_instance_lbl);
       __ LoadClassId(T0, kInstanceReg);
       __ BranchEqual(T0, type_cid, is_instance_lbl);
     }
     __ b(is_not_instance_lbl);
     return SubtypeTestCache::null();
   }
   if (type.IsInstantiated()) {
     const Class& type_class = Class::ZoneHandle(type.type_class());
     // A class equality check is only applicable with a dst type of a
     // non-parameterized class, non-signature class, or with a raw dst type of
@@ skipping 150 matching lines @@
 
   if (!FLAG_eliminate_type_checks || dst_type.IsMalformed()) {
     // If type checks are not eliminated during the graph building then
     // a transition sentinel can be seen here.
     __ BranchEqual(A0, Object::transition_sentinel(), &is_assignable);
   }
 
   // Generate throw new TypeError() if the type is malformed or malbounded.
   if (dst_type.IsMalformed() || dst_type.IsMalbounded()) {
     __ addiu(SP, SP, Immediate(-4 * kWordSize));
-    __ LoadObject(TMP1, Object::ZoneHandle());
-    __ sw(TMP1, Address(SP, 3 * kWordSize));  // Make room for the result.
+    __ LoadObject(TMP, Object::ZoneHandle());
+    __ sw(TMP, Address(SP, 3 * kWordSize));  // Make room for the result.
     __ sw(A0, Address(SP, 2 * kWordSize));  // Push the source object.
-    __ LoadObject(TMP1, dst_name);
-    __ sw(TMP1, Address(SP, 1 * kWordSize));  // Push the destination name.
-    __ LoadObject(TMP1, dst_type);
-    __ sw(TMP1, Address(SP, 0 * kWordSize));  // Push the destination type.
+    __ LoadObject(TMP, dst_name);
+    __ sw(TMP, Address(SP, 1 * kWordSize));  // Push the destination name.
+    __ LoadObject(TMP, dst_type);
+    __ sw(TMP, Address(SP, 0 * kWordSize));  // Push the destination type.
 
     GenerateRuntimeCall(token_pos,
                         deopt_id,
                         kBadTypeErrorRuntimeEntry,
                         3,
                         locs);
     // We should never return here.
     __ break_(0);
 
     __ Bind(&is_assignable);  // For a null object.
     // Restore instantiator and its type arguments.
     __ lw(A1, Address(SP, 0 * kWordSize));
     __ lw(A2, Address(SP, 1 * kWordSize));
     __ addiu(SP, SP, Immediate(2 * kWordSize));
     return;
   }
 
   // Generate inline type check, linking to runtime call if not assignable.
   SubtypeTestCache& test_cache = SubtypeTestCache::ZoneHandle();
   test_cache = GenerateInlineInstanceof(token_pos, dst_type,
                                         &is_assignable, &runtime_call);
 
   __ Bind(&runtime_call);
   // Load instantiator (A2) and its type arguments (A1).
   __ lw(A1, Address(SP, 0 * kWordSize));
   __ lw(A2, Address(SP, 1 * kWordSize));
 
   __ addiu(SP, SP, Immediate(-7 * kWordSize));
-  __ LoadObject(TMP1, Object::ZoneHandle());
-  __ sw(TMP1, Address(SP, 6 * kWordSize));  // Make room for the result.
+  __ LoadObject(TMP, Object::ZoneHandle());
+  __ sw(TMP, Address(SP, 6 * kWordSize));  // Make room for the result.
   __ sw(A0, Address(SP, 5 * kWordSize));  // Push the source object.
-  __ LoadObject(TMP1, dst_type);
-  __ sw(TMP1, Address(SP, 4 * kWordSize));  // Push the type of the destination.
+  __ LoadObject(TMP, dst_type);
+  __ sw(TMP, Address(SP, 4 * kWordSize));  // Push the type of the destination.
   __ sw(A2, Address(SP, 3 * kWordSize));  // Push instantiator.
   __ sw(A1, Address(SP, 2 * kWordSize));  // Push type arguments.
-  __ LoadObject(TMP1, dst_name);
-  __ sw(TMP1, Address(SP, 1 * kWordSize));  // Push the name of the destination.
+  __ LoadObject(TMP, dst_name);
+  __ sw(TMP, Address(SP, 1 * kWordSize));  // Push the name of the destination.
   __ LoadObject(T0, test_cache);
   __ sw(T0, Address(SP, 0 * kWordSize));
 
   GenerateRuntimeCall(token_pos, deopt_id, kTypeCheckRuntimeEntry, 6, locs);
   // Pop the parameters supplied to the runtime entry. The result of the
   // type check runtime call is the checked value.
   __ lw(A0, Address(SP, 6 * kWordSize));
   __ addiu(SP, SP, Immediate(7 * kWordSize));
 
   __ Bind(&is_assignable);
@@ skipping 617 matching lines @@
   MegamorphicCacheTable* table = Isolate::Current()->megamorphic_cache_table();
   const String& name = String::Handle(ic_data.target_name());
   const Array& arguments_descriptor =
       Array::ZoneHandle(ic_data.arguments_descriptor());
   ASSERT(!arguments_descriptor.IsNull());
   const MegamorphicCache& cache =
       MegamorphicCache::ZoneHandle(table->Lookup(name, arguments_descriptor));
   Label not_smi, load_cache;
   __ TraceSimMsg("MegamorphicInstanceCall");
   __ lw(T0, Address(SP, (argument_count - 1) * kWordSize));
-  __ andi(CMPRES, T0, Immediate(kSmiTagMask));
-  __ bne(CMPRES, ZR, &not_smi);
+  __ andi(CMPRES1, T0, Immediate(kSmiTagMask));
+  __ bne(CMPRES1, ZR, &not_smi);
   __ LoadImmediate(T0, Smi::RawValue(kSmiCid));
   __ b(&load_cache);
 
   __ Bind(&not_smi);
   __ LoadClassId(T0, T0);
   __ SmiTag(T0);
 
   // T0: class ID of the receiver (smi).
   __ Bind(&load_cache);
   __ LoadObject(T1, cache);
   __ lw(T2, FieldAddress(T1, MegamorphicCache::buckets_offset()));
   __ lw(T1, FieldAddress(T1, MegamorphicCache::mask_offset()));
   // T2: cache buckets array.
   // T1: mask.
   __ mov(T3, T0);
 
   Label loop, update, call_target_function;
   __ b(&loop);
 
   __ Bind(&update);
   __ addiu(T3, T3, Immediate(Smi::RawValue(1)));
   __ Bind(&loop);
   __ and_(T3, T3, T1);
   const intptr_t base = Array::data_offset();
   // T3 is smi tagged, but table entries are two words, so LSL 2.
-  __ sll(TMP1, T3, 2);
-  __ addu(TMP1, T2, TMP1);
+  __ sll(TMP, T3, 2);
+  __ addu(TMP, T2, TMP);
   __ lw(T4, FieldAddress(TMP, base));
 
   ASSERT(kIllegalCid == 0);
   __ beq(T4, ZR, &call_target_function);
   __ bne(T4, T0, &update);
 
   __ Bind(&call_target_function);
   // Call the target found in the cache.  For a class id match, this is a
   // proper target for the given name and arguments descriptor.  If the
   // illegal class id was found, the target is a cache miss handler that can
@@ skipping 87 matching lines @@
 
 void FlowGraphCompiler::EmitEqualityRegConstCompare(Register reg,
                                                     const Object& obj,
                                                     bool needs_number_check,
                                                     intptr_t token_pos) {
   __ TraceSimMsg("EqualityRegConstCompare");
   if (needs_number_check &&
       (obj.IsMint() || obj.IsDouble() || obj.IsBigint())) {
     __ addiu(SP, SP, Immediate(-2 * kWordSize));
     __ sw(reg, Address(SP, 1 * kWordSize));
-    __ LoadObject(TMP1, obj);
-    __ sw(TMP1, Address(SP, 0 * kWordSize));
+    __ LoadObject(TMP, obj);
+    __ sw(TMP, Address(SP, 0 * kWordSize));
     if (is_optimizing()) {
       __ BranchLinkPatchable(
           &StubCode::OptimizedIdenticalWithNumberCheckLabel());
     } else {
       __ BranchLinkPatchable(
           &StubCode::UnoptimizedIdenticalWithNumberCheckLabel());
     }
     AddCurrentDescriptor(PcDescriptors::kRuntimeCall,
                          Isolate::kNoDeoptId,
                          token_pos);
@@ skipping 20 matching lines @@
       __ BranchLinkPatchable(
           &StubCode::OptimizedIdenticalWithNumberCheckLabel());
     } else {
       __ BranchLinkPatchable(
           &StubCode::UnoptimizedIdenticalWithNumberCheckLabel());
     }
     AddCurrentDescriptor(PcDescriptors::kRuntimeCall,
                          Isolate::kNoDeoptId,
                          token_pos);
     __ TraceSimMsg("EqualityRegRegCompare return");
-    // Stub returns result in CMPRES. If it is 0, then left and right are equal.
+    // Stub returns result in CMPRES1. If it is 0, then left and right are
+    // equal.
     __ lw(right, Address(SP, 0 * kWordSize));
     __ lw(left, Address(SP, 1 * kWordSize));
     __ addiu(SP, SP, Immediate(2 * kWordSize));
   } else {
     __ slt(CMPRES1, left, right);
     __ slt(CMPRES2, right, left);
   }
 }
 
 
@@ skipping 148 matching lines @@
   assembler()->LoadImmediate(TMP, 1);
   if (true_condition == NE) {
     assembler()->movf(CMPRES1, ZR);
     assembler()->movt(CMPRES1, TMP);
   } else {
     assembler()->movf(CMPRES1, TMP);
     assembler()->movt(CMPRES1, ZR);
   }
   assembler()->mov(CMPRES2, ZR);
 
-  // EmitBranchOnCondition expects ordering to be described by CMPRES, CMPRES2.
+  // EmitBranchOnCondition expects ordering to be described by CMPRES1, CMPRES2.
   branch->EmitBranchOnCondition(this, EQ);
 }
 
 
 void FlowGraphCompiler::EmitDoubleCompareBool(Condition true_condition,
                                               FpuRegister left,
                                               FpuRegister right,
                                               Register result) {
   Label done;
   __ Comment("DoubleCompareBool");
@@ skipping 209 matching lines @@
     } else if (other_move.Blocks(destination)) {
       moves_[i]->set_src(source);
     }
   }
 }
 
 
 void ParallelMoveResolver::MoveMemoryToMemory(const Address& dst,
                                               const Address& src) {
   __ TraceSimMsg("ParallelMoveResolver::MoveMemoryToMemory");
-  __ lw(TMP1, src);
-  __ sw(TMP1, dst);
+  __ lw(TMP, src);
+  __ sw(TMP, dst);
 }
 
 
 void ParallelMoveResolver::StoreObject(const Address& dst, const Object& obj) {
   __ TraceSimMsg("ParallelMoveResolver::StoreObject");
-  __ LoadObject(TMP1, obj);
-  __ sw(TMP1, dst);
+  __ LoadObject(TMP, obj);
+  __ sw(TMP, dst);
 }
 
 
 // Do not call or implement this function. Instead, use the form below that
 // uses an offset from the frame pointer instead of an Address.
 void ParallelMoveResolver::Exchange(Register reg, const Address& mem) {
   UNREACHABLE();
 }
 
 
@@ skipping 46 matching lines @@
   __ AddImmediate(SP, kDoubleSize);
 }
 
 
 #undef __
 
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS