Merge (x & y) == 0 pattern to emit a single test instruction.

runtime/vm/assembler_mips.h

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #ifndef VM_ASSEMBLER_MIPS_H_
 #define VM_ASSEMBLER_MIPS_H_
 
 #ifndef VM_ASSEMBLER_H_
 #error Do not include assembler_mips.h directly; use assembler.h instead.
 #endif
@@ skipping 720 matching lines @@
   }
 
   void xor_(Register rd, Register rs, Register rt) {
     EmitRType(SPECIAL, rs, rt, rd, 0, XOR);
   }
 
   // Macros in alphabetical order.
 
   // Addition of rs and rt with the result placed in rd.
   // After, ro < 0 if there was signed overflow, ro >= 0 otherwise.
-  // rd and ro must not be TMP1.
+  // rd and ro must not be TMP.
   // ro must be different from all the other registers.
   // If rd, rs, and rt are the same register, then a scratch register different
   // from the other registers is needed.
   void AdduDetectOverflow(Register rd, Register rs, Register rt, Register ro,
                           Register scratch = kNoRegister);
 
   // ro must be different from rd and rs.
-  // rd and ro must not be TMP1.
+  // rd and ro must not be TMP.
   // If rd and rs are the same, a scratch register different from the other
   // registers is needed.
   void AddImmediateDetectOverflow(Register rd, Register rs, int32_t imm,
                                   Register ro, Register scratch = kNoRegister) {
     LoadImmediate(rd, imm);
     AdduDetectOverflow(rd, rs, rd, ro, scratch);
   }
 
   // Subtraction of rt from rs (rs - rt) with the result placed in rd.
   // After, ro < 0 if there was signed overflow, ro >= 0 otherwise.
-  // None of rd, rs, rt, or ro may be TMP1.
+  // None of rd, rs, rt, or ro may be TMP.
   // ro must be different from the other registers.
   void SubuDetectOverflow(Register rd, Register rs, Register rt, Register ro);
 
   // ro must be different from rd and rs.
-  // None of rd, rs, rt, or ro may be TMP1.
+  // None of rd, rs, rt, or ro may be TMP.
   void SubImmediateDetectOverflow(Register rd, Register rs, int32_t imm,
                                   Register ro) {
     LoadImmediate(rd, imm);
     SubuDetectOverflow(rd, rs, rd, ro);
   }
 
   void Branch(const ExternalLabel* label) {
-    LoadImmediate(TMP1, label->address());
-    jr(TMP1);
+    LoadImmediate(TMP, label->address());
+    jr(TMP);
   }
 
   void BranchPatchable(const ExternalLabel* label) {
     const uint16_t low = Utils::Low16Bits(label->address());
     const uint16_t high = Utils::High16Bits(label->address());
-    lui(TMP1, Immediate(high));
-    ori(TMP1, TMP1, Immediate(low));
-    jr(TMP1);
+    lui(TMP, Immediate(high));
+    ori(TMP, TMP, Immediate(low));
+    jr(TMP);
     delay_slot_available_ = false;  // CodePatcher expects a nop.
   }
 
   void BranchLink(const ExternalLabel* label) {
-    LoadImmediate(TMP1, label->address());
-    jalr(TMP1);
+    LoadImmediate(TMP, label->address());
+    jalr(TMP);
   }
 
   void BranchLinkPatchable(const ExternalLabel* label) {
     const int32_t offset =
         Array::data_offset() + 4*AddExternalLabel(label) - kHeapObjectTag;
-    LoadWordFromPoolOffset(TMP1, offset);
-    jalr(TMP1);
+    LoadWordFromPoolOffset(TMP, offset);
+    jalr(TMP);
     delay_slot_available_ = false;  // CodePatcher expects a nop.
   }
 
   void Drop(intptr_t stack_elements) {
     ASSERT(stack_elements >= 0);
     if (stack_elements > 0) {
       addiu(SP, SP, Immediate(stack_elements * kWordSize));
     }
   }
 
   void LoadImmediate(Register rd, int32_t value) {
     if (Utils::IsInt(kImmBits, value)) {
       addiu(rd, ZR, Immediate(value));
     } else {
       const uint16_t low = Utils::Low16Bits(value);
       const uint16_t high = Utils::High16Bits(value);
       lui(rd, Immediate(high));
       ori(rd, rd, Immediate(low));
     }
   }
 
   void LoadImmediate(DRegister rd, double value) {
     FRegister frd = static_cast<FRegister>(rd * 2);
     const int64_t ival = bit_cast<uint64_t, double>(value);
     const int32_t low = Utils::Low32Bits(ival);
     const int32_t high = Utils::High32Bits(ival);
     if (low != 0) {
-      LoadImmediate(TMP1, low);
-      mtc1(TMP1, frd);
+      LoadImmediate(TMP, low);
+      mtc1(TMP, frd);
     } else {
       mtc1(ZR, frd);
     }
 
     if (high != 0) {
-      LoadImmediate(TMP1, high);
-      mtc1(TMP1, static_cast<FRegister>(frd + 1));
+      LoadImmediate(TMP, high);
+      mtc1(TMP, static_cast<FRegister>(frd + 1));
     } else {
       mtc1(ZR, static_cast<FRegister>(frd + 1));
     }
   }
 
   void LoadImmediate(FRegister rd, float value) {
     const int32_t ival = bit_cast<int32_t, float>(value);
     if (ival == 0) {
       mtc1(ZR, rd);
     } else {
-      LoadImmediate(TMP1, ival);
-      mtc1(TMP1, rd);
+      LoadImmediate(TMP, ival);
+      mtc1(TMP, rd);
     }
   }
 
   void AddImmediate(Register rd, Register rs, int32_t value) {
     if ((value == 0) && (rd == rs)) return;
     // If value is 0, we still want to move rs to rd if they aren't the same.
     if (Utils::IsInt(kImmBits, value)) {
       addiu(rd, rs, Immediate(value));
     } else {
-      LoadImmediate(TMP1, value);
-      addu(rd, rs, TMP1);
+      LoadImmediate(TMP, value);
+      addu(rd, rs, TMP);
     }
   }
 
   void AddImmediate(Register rd, int32_t value) {
     AddImmediate(rd, rd, value);
   }
 
   void AndImmediate(Register rd, Register rs, int32_t imm) {
     if (imm == 0) {
       mov(rd, ZR);
@@ skipping 410 matching lines @@
                                   Register value,
                                   Label* no_update);
 
   DISALLOW_ALLOCATION();
   DISALLOW_COPY_AND_ASSIGN(Assembler);
 };
 
 }  // namespace dart
 
 #endif  // VM_ASSEMBLER_MIPS_H_