Merge (x & y) == 0 pattern to emit a single test instruction.

runtime/vm/assembler_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/assembler.h"
 #include "vm/longjump.h"
 #include "vm/runtime_entry.h"
@@ skipping 2424 matching lines @@
   if (ShifterOperand::CanHold(value, &shifter_op)) {
     cmp(rn, shifter_op, cond);
   } else {
     ASSERT(rn != IP);
     LoadImmediate(IP, value, cond);
     cmp(rn, ShifterOperand(IP), cond);
   }
 }
 
 
+void Assembler::TestImmediate(Register rn, int32_t imm, Condition cond) {
+  ShifterOperand shifter_op;
+  if (ShifterOperand::CanHold(imm, &shifter_op)) {
+    tst(rn, shifter_op, cond);
+  } else {
+    LoadImmediate(IP, imm);
+    tst(rn, ShifterOperand(IP), cond);
+  }
+}
+
 void Assembler::IntegerDivide(Register result, Register left, Register right,
                               DRegister tmpl, DRegister tmpr) {
   ASSERT(tmpl != tmpr);
   if (CPUFeatures::integer_division_supported()) {
     sdiv(result, left, right);
   } else {
     SRegister stmpl = static_cast<SRegister>(2 * tmpl);
     SRegister stmpr = static_cast<SRegister>(2 * tmpr);
     vmovsr(stmpl, left);
     vcvtdi(tmpl, stmpl);  // left is in tmpl.
@@ skipping 297 matching lines @@
 
 const char* Assembler::FpuRegisterName(FpuRegister reg) {
   ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
   return fpu_reg_names[reg];
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM