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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #ifndef VM_ASSEMBLER_MIPS_H_ | 5 #ifndef VM_ASSEMBLER_MIPS_H_ |
| 6 #define VM_ASSEMBLER_MIPS_H_ | 6 #define VM_ASSEMBLER_MIPS_H_ |
| 7 | 7 |
| 8 #ifndef VM_ASSEMBLER_H_ | 8 #ifndef VM_ASSEMBLER_H_ |
| 9 #error Do not include assembler_mips.h directly; use assembler.h instead. | 9 #error Do not include assembler_mips.h directly; use assembler.h instead. |
| 10 #endif | 10 #endif |
| (...skipping 910 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
| 921 } | 921 } |
| 922 | 922 |
| 923 if (Utils::IsUint(kImmBits, imm)) { | 923 if (Utils::IsUint(kImmBits, imm)) { |
| 924 andi(rd, rs, Immediate(imm)); | 924 andi(rd, rs, Immediate(imm)); |
| 925 } else { | 925 } else { |
| 926 LoadImmediate(TMP, imm); | 926 LoadImmediate(TMP, imm); |
| 927 and_(rd, rs, TMP); | 927 and_(rd, rs, TMP); |
| 928 } | 928 } |
| 929 } | 929 } |
| 930 | 930 |
| 931 void BranchEqual(Register rd, Register rn, Label* l) { | |
| 932 beq(rd, rn, l); | |
| 933 } | |
| 934 | |
| 931 void BranchEqual(Register rd, int32_t value, Label* l) { | 935 void BranchEqual(Register rd, int32_t value, Label* l) { |
|
Ivan Posva
2014/09/23 14:31:43
The real issue is that we are not using Immediate
Vyacheslav Egorov (Google)
2014/09/23 14:42:31
Alternative interpretation could be: we should mak
| |
| 932 ASSERT(!in_delay_slot_); | 936 ASSERT(!in_delay_slot_); |
| 933 if (value == 0) { | 937 if (value == 0) { |
| 934 beq(rd, ZR, l); | 938 beq(rd, ZR, l); |
| 935 } else { | 939 } else { |
| 936 ASSERT(rd != CMPRES2); | 940 ASSERT(rd != CMPRES2); |
| 937 LoadImmediate(CMPRES2, value); | 941 LoadImmediate(CMPRES2, value); |
| 938 beq(rd, CMPRES2, l); | 942 beq(rd, CMPRES2, l); |
| 939 } | 943 } |
| 940 } | 944 } |
| 941 | 945 |
| 942 void BranchEqual(Register rd, const Object& object, Label* l) { | 946 void BranchEqual(Register rd, const Object& object, Label* l) { |
| 943 ASSERT(!in_delay_slot_); | 947 ASSERT(!in_delay_slot_); |
| 944 ASSERT(rd != CMPRES2); | 948 ASSERT(rd != CMPRES2); |
| 945 LoadObject(CMPRES2, object); | 949 LoadObject(CMPRES2, object); |
| 946 beq(rd, CMPRES2, l); | 950 beq(rd, CMPRES2, l); |
| 947 } | 951 } |
| 948 | 952 |
| 953 void BranchNotEqual(Register rd, Register rn, Label* l) { | |
| 954 bne(rd, rn, l); | |
| 955 } | |
| 956 | |
| 949 void BranchNotEqual(Register rd, int32_t value, Label* l) { | 957 void BranchNotEqual(Register rd, int32_t value, Label* l) { |
| 950 ASSERT(!in_delay_slot_); | 958 ASSERT(!in_delay_slot_); |
| 951 if (value == 0) { | 959 if (value == 0) { |
| 952 bne(rd, ZR, l); | 960 bne(rd, ZR, l); |
| 953 } else { | 961 } else { |
| 954 ASSERT(rd != CMPRES2); | 962 ASSERT(rd != CMPRES2); |
| 955 LoadImmediate(CMPRES2, value); | 963 LoadImmediate(CMPRES2, value); |
| 956 bne(rd, CMPRES2, l); | 964 bne(rd, CMPRES2, l); |
| 957 } | 965 } |
| 958 } | 966 } |
| (...skipping 437 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
| 1396 Register value, | 1404 Register value, |
| 1397 Label* no_update); | 1405 Label* no_update); |
| 1398 | 1406 |
| 1399 DISALLOW_ALLOCATION(); | 1407 DISALLOW_ALLOCATION(); |
| 1400 DISALLOW_COPY_AND_ASSIGN(Assembler); | 1408 DISALLOW_COPY_AND_ASSIGN(Assembler); |
| 1401 }; | 1409 }; |
| 1402 | 1410 |
| 1403 } // namespace dart | 1411 } // namespace dart |
| 1404 | 1412 |
| 1405 #endif // VM_ASSEMBLER_MIPS_H_ | 1413 #endif // VM_ASSEMBLER_MIPS_H_ |
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