Handle "inplace" ops and unary ops w/ assembler

src/assembler_ia32.h

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // Modified by the Subzero authors.
 //
 //===- subzero/src/assembler_ia32.h - Assembler for x86-32 ----------------===//
 //
 //                        The Subzero Code Generator
 //
@@ skipping 318 matching lines @@
 public:
   explicit AssemblerX86(bool use_far_branches = false) : buffer_(*this) {
     // This mode is only needed and implemented for MIPS and ARM.
     assert(!use_far_branches);
   }
   ~AssemblerX86() {}
 
   static const bool kNearJump = true;
   static const bool kFarJump = false;
 
+  // Operations to emit GPR instructions (and dispatch on operand type).
+  typedef void (AssemblerX86::*TypedEmitGPR)(Type, GPRRegister);
+  typedef void (AssemblerX86::*TypedEmitAddr)(Type, const Address &);
+  struct GPREmitterOneOp {
+    TypedEmitGPR Reg;
+    TypedEmitAddr Addr;
+  };
+
+  typedef void (AssemblerX86::*TypedEmitGPRGPR)(Type, GPRRegister, GPRRegister);
+  typedef void (AssemblerX86::*TypedEmitGPRAddr)(Type, GPRRegister,
+                                                 const Address &);
+  typedef void (AssemblerX86::*TypedEmitGPRImm)(Type, GPRRegister,
+                                                const Immediate &);
+  struct GPREmitterRegOp {
+    TypedEmitGPRGPR GPRGPR;
+    TypedEmitGPRAddr GPRAddr;
+    TypedEmitGPRImm GPRImm;
+  };
+
   // Operations to emit XMM instructions (and dispatch on operand type).
   typedef void (AssemblerX86::*TypedEmitXmmXmm)(Type, XmmRegister, XmmRegister);
   typedef void (AssemblerX86::*TypedEmitXmmAddr)(Type, XmmRegister,
                                                  const Address &);
   typedef void (AssemblerX86::*TypedEmitAddrXmm)(Type, const Address &,
                                                  XmmRegister);
-  struct TypedXmmEmitters {
+  struct XmmEmitterTwoOps {
     TypedEmitXmmXmm XmmXmm;
     TypedEmitXmmAddr XmmAddr;
     TypedEmitAddrXmm AddrXmm;
   };
 
   /*
    * Emit Machine Instructions.
    */
   void call(GPRRegister reg);
   void call(const Address &address);
@@ skipping 30 matching lines @@
   void movb(const Address &dst, ByteRegister src);
   void movb(const Address &dst, const Immediate &imm);
 
   void movzxw(GPRRegister dst, GPRRegister src);
   void movzxw(GPRRegister dst, const Address &src);
   void movsxw(GPRRegister dst, GPRRegister src);
   void movsxw(GPRRegister dst, const Address &src);
   void movw(GPRRegister dst, const Address &src);
   void movw(const Address &dst, GPRRegister src);
 
-  void leal(GPRRegister dst, const Address &src);
+  void lea(Type Ty, GPRRegister dst, const Address &src);
 
   void cmov(CondX86::BrCond cond, GPRRegister dst, GPRRegister src);
 
   void rep_movsb();
 
   void movss(XmmRegister dst, const Address &src);
   void movss(const Address &dst, XmmRegister src);
   void movss(XmmRegister dst, XmmRegister src);
 
   void movd(XmmRegister dst, GPRRegister src);
+  void movd(XmmRegister dst, const Address &src);
   void movd(GPRRegister dst, XmmRegister src);
+  void movd(const Address &dst, XmmRegister src);
 
   void movq(const Address &dst, XmmRegister src);
   void movq(XmmRegister dst, const Address &src);
 
   void addss(Type Ty, XmmRegister dst, XmmRegister src);
   void addss(Type Ty, XmmRegister dst, const Address &src);
   void subss(Type Ty, XmmRegister dst, XmmRegister src);
   void subss(Type Ty, XmmRegister dst, const Address &src);
   void mulss(Type Ty, XmmRegister dst, XmmRegister src);
   void mulss(Type Ty, XmmRegister dst, const Address &src);
@@ skipping 197 matching lines @@
   void sarl(GPRRegister reg, const Immediate &imm);
   void sarl(GPRRegister operand, GPRRegister shifter);
   void sarl(const Address &address, GPRRegister shifter);
   void shld(GPRRegister dst, GPRRegister src);
   void shld(GPRRegister dst, GPRRegister src, const Immediate &imm);
   void shld(const Address &operand, GPRRegister src);
   void shrd(GPRRegister dst, GPRRegister src);
   void shrd(GPRRegister dst, GPRRegister src, const Immediate &imm);
   void shrd(const Address &dst, GPRRegister src);
 
-  void negl(GPRRegister reg);
+  void neg(Type Ty, GPRRegister reg);
+  void neg(Type Ty, const Address &addr);
   void notl(GPRRegister reg);
 
-  void bsrl(GPRRegister dst, GPRRegister src);
+  void bsf(Type Ty, GPRRegister dst, GPRRegister src);
+  void bsf(Type Ty, GPRRegister dst, const Address &src);
+  void bsr(Type Ty, GPRRegister dst, GPRRegister src);
+  void bsr(Type Ty, GPRRegister dst, const Address &src);
+
+  void bswap(Type Ty, GPRRegister reg);
 
   void bt(GPRRegister base, GPRRegister offset);
 
   void ret();
   void ret(const Immediate &imm);
 
   // 'size' indicates size in bytes and must be in the range 1..8.
   void nop(int size = 1);
   void int3();
   void hlt();
@@ skipping 79 matching lines @@
 inline void AssemblerX86::EmitFixup(AssemblerFixup *fixup) {
   buffer_.EmitFixup(fixup);
 }
 
 inline void AssemblerX86::EmitOperandSizeOverride() { EmitUint8(0x66); }
 
 } // end of namespace x86
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ASSEMBLER_IA32_H_