Expands the use of Immediate and Operand wrappers.

runtime/vm/assembler_arm64.cc

 // Copyright (c) 2014, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM64)
 
 #include "vm/assembler.h"
 #include "vm/cpu.h"
 #include "vm/longjump.h"
@@ skipping 383 matching lines @@
     ldr(dst, Address(pp, offset));
   } else if (Operand::CanHold(upper20, kXRegSizeInBits, &op) ==
              Operand::Immediate) {
     const uint32_t lower12 = offset & 0x00000fff;
     ASSERT(Address::CanHoldOffset(lower12));
     add(dst, pp, op);
     ldr(dst, Address(dst, lower12));
   } else {
     const uint16_t offset_low = Utils::Low16Bits(offset);
     const uint16_t offset_high = Utils::High16Bits(offset);
-    movz(dst, offset_low, 0);
+    movz(dst, Immediate(offset_low), 0);
     if (offset_high != 0) {
-      movk(dst, offset_high, 1);
+      movk(dst, Immediate(offset_high), 1);
     }
     ldr(dst, Address(pp, dst));
   }
 }
 
 
 void Assembler::LoadWordFromPoolOffsetFixed(Register dst, Register pp,
                                             uint32_t offset) {
   ASSERT(dst != pp);
   Operand op;
@@ skipping 171 matching lines @@
 void Assembler::LoadDecodableImmediate(Register reg, int64_t imm, Register pp) {
   if ((pp != kNoPP) &&
       (Isolate::Current() != Dart::vm_isolate()) &&
       allow_constant_pool()) {
     int64_t val_smi_tag = imm & kSmiTagMask;
     imm &= ~kSmiTagMask;  // Mask off the tag bits.
     const int32_t offset = Array::element_offset(FindImmediate(imm));
     LoadWordFromPoolOffset(reg, pp, offset);
     if (val_smi_tag != 0) {
       // Add back the tag bits.
-      orri(reg, reg, val_smi_tag);
+      orri(reg, reg, Immediate(val_smi_tag));
     }
   } else {
     // TODO(zra): Since this sequence only needs to be decodable, it can be
     // of variable length.
     LoadImmediateFixed(reg, imm);
   }
 }
 
 
 void Assembler::LoadImmediateFixed(Register reg, int64_t imm) {
   const uint32_t w0 = Utils::Low32Bits(imm);
   const uint32_t w1 = Utils::High32Bits(imm);
   const uint16_t h0 = Utils::Low16Bits(w0);
   const uint16_t h1 = Utils::High16Bits(w0);
   const uint16_t h2 = Utils::Low16Bits(w1);
   const uint16_t h3 = Utils::High16Bits(w1);
-  movz(reg, h0, 0);
-  movk(reg, h1, 1);
-  movk(reg, h2, 2);
-  movk(reg, h3, 3);
+  movz(reg, Immediate(h0), 0);
+  movk(reg, Immediate(h1), 1);
+  movk(reg, Immediate(h2), 2);
+  movk(reg, Immediate(h3), 3);
 }
 
 
 void Assembler::LoadImmediate(Register reg, int64_t imm, Register pp) {
   Comment("LoadImmediate");
   if (CanLoadImmediateFromPool(imm, pp)) {
     // It's a 64-bit constant and we're not in the VM isolate, so load from
     // object pool.
     // Save the bits that must be masked-off for the SmiTag
     int64_t val_smi_tag = imm & kSmiTagMask;
     imm &= ~kSmiTagMask;  // Mask off the tag bits.
     const int32_t offset = Array::element_offset(FindImmediate(imm));
     LoadWordFromPoolOffset(reg, pp, offset);
     if (val_smi_tag != 0) {
       // Add back the tag bits.
-      orri(reg, reg, val_smi_tag);
+      orri(reg, reg, Immediate(val_smi_tag));
     }
   } else {
     // 0. Is it 0?
     if (imm == 0) {
-      movz(reg, 0, 0);
+      movz(reg, Immediate(0), 0);
       return;
     }
 
     // 1. Can we use one orri operation?
     Operand op;
     Operand::OperandType ot;
     ot = Operand::CanHold(imm, kXRegSizeInBits, &op);
     if (ot == Operand::BitfieldImm) {
-      orri(reg, ZR, imm);
+      orri(reg, ZR, Immediate(imm));
       return;
     }
 
     // 2. Fall back on movz, movk, movn.
     const uint32_t w0 = Utils::Low32Bits(imm);
     const uint32_t w1 = Utils::High32Bits(imm);
     const uint16_t h0 = Utils::Low16Bits(w0);
     const uint16_t h1 = Utils::High16Bits(w0);
     const uint16_t h2 = Utils::Low16Bits(w1);
     const uint16_t h3 = Utils::High16Bits(w1);
 
     // Special case for w1 == 0xffffffff
     if (w1 == 0xffffffff) {
       if (h1 == 0xffff) {
-        movn(reg, ~h0, 0);
+        movn(reg, Immediate(~h0), 0);
       } else {
-        movn(reg, ~h1, 1);
-        movk(reg, h0, 0);
+        movn(reg, Immediate(~h1), 1);
+        movk(reg, Immediate(h0), 0);
       }
       return;
     }
 
     // Special case for h3 == 0xffff
     if (h3 == 0xffff) {
       // We know h2 != 0xffff.
-      movn(reg, ~h2, 2);
+      movn(reg, Immediate(~h2), 2);
       if (h1 != 0xffff) {
-        movk(reg, h1, 1);
+        movk(reg, Immediate(h1), 1);
       }
       if (h0 != 0xffff) {
-        movk(reg, h0, 0);
+        movk(reg, Immediate(h0), 0);
       }
       return;
     }
 
     bool initialized = false;
     if (h0 != 0) {
-      movz(reg, h0, 0);
+      movz(reg, Immediate(h0), 0);
       initialized = true;
     }
     if (h1 != 0) {
       if (initialized) {
-        movk(reg, h1, 1);
+        movk(reg, Immediate(h1), 1);
       } else {
-        movz(reg, h1, 1);
+        movz(reg, Immediate(h1), 1);
         initialized = true;
       }
     }
     if (h2 != 0) {
       if (initialized) {
-        movk(reg, h2, 2);
+        movk(reg, Immediate(h2), 2);
       } else {
-        movz(reg, h2, 2);
+        movz(reg, Immediate(h2), 2);
         initialized = true;
       }
     }
     if (h3 != 0) {
       if (initialized) {
-        movk(reg, h3, 3);
+        movk(reg, Immediate(h3), 3);
       } else {
-        movz(reg, h3, 3);
+        movz(reg, Immediate(h3), 3);
       }
     }
   }
 }
 
 
 void Assembler::LoadDImmediate(VRegister vd, double immd, Register pp) {
   if (!fmovdi(vd, immd)) {
     int64_t imm = bit_cast<int64_t, double>(immd);
     LoadImmediate(TMP, imm, pp);
@@ skipping 60 matching lines @@
     LoadImmediate(TMP2, imm, pp);
     subs(dest, rn, Operand(TMP2));
   }
 }
 
 
 void Assembler::AndImmediate(
     Register rd, Register rn, int64_t imm, Register pp) {
   Operand imm_op;
   if (Operand::IsImmLogical(imm, kXRegSizeInBits, &imm_op)) {
-    andi(rd, rn, imm);
+    andi(rd, rn, Immediate(imm));
   } else {
     LoadImmediate(TMP, imm, pp);
     and_(rd, rn, Operand(TMP));
   }
 }
 
 
 void Assembler::OrImmediate(
     Register rd, Register rn, int64_t imm, Register pp) {
   Operand imm_op;
   if (Operand::IsImmLogical(imm, kXRegSizeInBits, &imm_op)) {
-    orri(rd, rn, imm);
+    orri(rd, rn, Immediate(imm));
   } else {
     LoadImmediate(TMP, imm, pp);
     orr(rd, rn, Operand(TMP));
   }
 }
 
 
 void Assembler::XorImmediate(
     Register rd, Register rn, int64_t imm, Register pp) {
   Operand imm_op;
   if (Operand::IsImmLogical(imm, kXRegSizeInBits, &imm_op)) {
-    eori(rd, rn, imm);
+    eori(rd, rn, Immediate(imm));
   } else {
     LoadImmediate(TMP, imm, pp);
     eor(rd, rn, Operand(TMP));
   }
 }
 
 
 void Assembler::TestImmediate(Register rn, int64_t imm, Register pp) {
   Operand imm_op;
   if (Operand::IsImmLogical(imm, kXRegSizeInBits, &imm_op)) {
-    tsti(rn, imm);
+    tsti(rn, Immediate(imm));
   } else {
     LoadImmediate(TMP, imm, pp);
     tst(rn, Operand(TMP));
   }
 }
 
 
 void Assembler::CompareImmediate(Register rn, int64_t imm, Register pp) {
   Operand op;
   if (Operand::CanHold(imm, kXRegSizeInBits, &op) == Operand::Immediate) {
@@ skipping 121 matching lines @@
                                            Register value,
                                            Label* no_update) {
   COMPILE_ASSERT((kNewObjectAlignmentOffset == kWordSize) &&
                  (kOldObjectAlignmentOffset == 0));
 
   // Write-barrier triggers if the value is in the new space (has bit set) and
   // the object is in the old space (has bit cleared).
   // To check that, we compute value & ~object and skip the write barrier
   // if the bit is not set. We can't destroy the object.
   bic(TMP, value, Operand(object));
-  tsti(TMP, kNewObjectAlignmentOffset);
+  tsti(TMP, Immediate(kNewObjectAlignmentOffset));
   b(no_update, EQ);
 }
 
 
 // Preserves object and value registers.
 void Assembler::StoreIntoObjectFilter(Register object,
                                       Register value,
                                       Label* no_update) {
   // For the value we are only interested in the new/old bit and the tag bit.
   // And the new bit with the tag bit. The resulting bit will be 0 for a Smi.
   and_(TMP, value, Operand(value, LSL, kObjectAlignmentLog2 - 1));
   // And the result with the negated space bit of the object.
   bic(TMP, TMP, Operand(object));
-  tsti(TMP, kNewObjectAlignmentOffset);
+  tsti(TMP, Immediate(kNewObjectAlignmentOffset));
   b(no_update, EQ);
 }
 
 
 void Assembler::StoreIntoObjectOffset(Register object,
                                       int32_t offset,
                                       Register value,
                                       Register pp,
                                       bool can_value_be_smi) {
   if (Address::CanHoldOffset(offset - kHeapObjectTag)) {
@@ skipping 119 matching lines @@
   LoadClassId(TMP, object, pp);
   CompareImmediate(TMP, class_id, pp);
 }
 
 
 void Assembler::LoadTaggedClassIdMayBeSmi(Register result, Register object) {
   // Load up a null object. We only need it so we can use LoadClassId on it in
   // the case that object is a Smi..
   LoadObject(TMP, Object::null_object(), PP);
   // Check if the object is a Smi.
-  tsti(object, kSmiTagMask);
+  tsti(object, Immediate(kSmiTagMask));
   // If the object *is* a Smi, use the null object instead. o/w leave alone.
   csel(TMP, TMP, object, EQ);
   // Loads either the cid of the object if it isn't a Smi, or the cid of null
   // if it is a Smi, which will be ignored.
   LoadClassId(result, TMP, PP);
 
   LoadImmediate(TMP, kSmiCid, PP);
   // If object is a Smi, move the Smi cid into result. o/w leave alone.
   csel(result, TMP, result, EQ);
   // Finally, tag the result.
   SmiTag(result);
 }
 
 
 // Frame entry and exit.
 void Assembler::ReserveAlignedFrameSpace(intptr_t frame_space) {
   // Reserve space for arguments and align frame before entering
   // the C++ world.
   if (frame_space != 0) {
     AddImmediate(SP, SP, -frame_space, kNoPP);
   }
   if (OS::ActivationFrameAlignment() > 1) {
-    andi(SP, SP, ~(OS::ActivationFrameAlignment() - 1));
+    andi(SP, SP, Immediate(~(OS::ActivationFrameAlignment() - 1)));
   }
 }
 
 
 void Assembler::EnterFrame(intptr_t frame_size) {
   Push(LR);
   Push(FP);
   mov(FP, SP);
 
   if (frame_size > 0) {
     sub(SP, SP, Operand(frame_size));
   }
 }
 
 
 void Assembler::LeaveFrame() {
   mov(SP, FP);
   Pop(FP);
   Pop(LR);
 }
 
 
 void Assembler::EnterDartFrame(intptr_t frame_size) {
   // Setup the frame.
-  adr(TMP, -CodeSize());  // TMP gets PC marker.
+  adr(TMP, Immediate(-CodeSize()));  // TMP gets PC marker.
   EnterFrame(0);
   Push(TMP);  // Save PC Marker.
   TagAndPushPP();  // Save PP.
 
   // Load the pool pointer.
   LoadPoolPointer(PP);
 
   // Reserve space.
   if (frame_size > 0) {
     AddImmediate(SP, SP, -frame_size, PP);
   }
 }
 
 
 void Assembler::EnterDartFrameWithInfo(intptr_t frame_size, Register new_pp) {
   // Setup the frame.
-  adr(TMP, -CodeSize());  // TMP gets PC marker.
+  adr(TMP, Immediate(-CodeSize()));  // TMP gets PC marker.
   EnterFrame(0);
   Push(TMP);  // Save PC Marker.
   TagAndPushPP();  // Save PP.
 
   // Load the pool pointer.
   if (new_pp == kNoPP) {
     LoadPoolPointer(PP);
   } else {
     mov(PP, new_pp);
   }
 
   // Reserve space.
   if (frame_size > 0) {
     AddImmediate(SP, SP, -frame_size, PP);
   }
 }
 
 
 // On entry to a function compiled for OSR, the caller's frame pointer, the
 // stack locals, and any copied parameters are already in place.  The frame
 // pointer is already set up.  The PC marker is not correct for the
 // optimized function and there may be extra space for spill slots to
 // allocate. We must also set up the pool pointer for the function.
 void Assembler::EnterOsrFrame(intptr_t extra_size, Register new_pp) {
   Comment("EnterOsrFrame");
-  adr(TMP, -CodeSize());
+  adr(TMP, Immediate(-CodeSize()));
 
   StoreToOffset(TMP, FP, kPcMarkerSlotFromFp * kWordSize, kNoPP);
 
   // Setup pool pointer for this dart function.
   if (new_pp == kNoPP) {
     LoadPoolPointer(PP);
   } else {
     mov(PP, new_pp);
   }
 
@@ skipping 294 matching lines @@
     add(base, array, Operand(index, LSL, shift));
   }
   const OperandSize size = Address::OperandSizeFor(cid);
   ASSERT(Address::CanHoldOffset(offset, Address::Offset, size));
   return Address(base, offset, Address::Offset, size);
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM64