Expands the use of Immediate and Operand wrappers.

runtime/vm/intermediate_language_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_ARM.
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/intermediate_language.h"
 
 #include "vm/cpu.h"
@@ skipping 166 matching lines @@
     } else {
       true_condition = NegateCondition(true_condition);
     }
   }
 
   __ mov(result, Operand(1), true_condition);
 
   if (is_power_of_two_kind) {
     const intptr_t shift =
         Utils::ShiftForPowerOfTwo(Utils::Maximum(true_value, false_value));
-    __ Lsl(result, result, shift + kSmiTagSize);
+    __ Lsl(result, result, Operand(shift + kSmiTagSize));
   } else {
     __ sub(result, result, Operand(1));
     const int32_t val =
         Smi::RawValue(true_value) - Smi::RawValue(false_value);
     __ AndImmediate(result, result, val);
     if (false_value != 0) {
       __ AddImmediate(result, Smi::RawValue(false_value));
     }
   }
 }
@@ skipping 2655 matching lines @@
       : NULL;
   if (locs.in(1).IsConstant()) {
     const Object& constant = locs.in(1).constant();
     ASSERT(constant.IsSmi());
     // Immediate shift operation takes 5 bits for the count.
     const intptr_t kCountLimit = 0x1F;
     const intptr_t value = Smi::Cast(constant).Value();
     ASSERT((0 < value) && (value < kCountLimit));
     if (shift_left->can_overflow()) {
       // Check for overflow (preserve left).
-      __ Lsl(IP, left, value);
+      __ Lsl(IP, left, Operand(value));
       __ cmp(left, Operand(IP, ASR, value));
       __ b(deopt, NE);  // Overflow.
     }
     // Shift for result now we know there is no overflow.
-    __ Lsl(result, left, value);
+    __ Lsl(result, left, Operand(value));
     return;
   }
 
   // Right (locs.in(1)) is not constant.
   const Register right = locs.in(1).reg();
   Range* right_range = shift_left->right()->definition()->range();
   if (shift_left->left()->BindsToConstant() && shift_left->can_overflow()) {
     // TODO(srdjan): Implement code below for is_truncating().
     // If left is constant, we know the maximal allowed size for right.
     const Object& obj = shift_left->left()->BoundConstant();
@@ skipping 236 matching lines @@
         } else {
           __ LoadImmediate(IP, imm);
           __ eor(result, left, Operand(IP));
         }
         break;
       }
       case Token::kSHR: {
         // sarl operation masks the count to 5 bits.
         const intptr_t kCountLimit = 0x1F;
         intptr_t value = Smi::Cast(constant).Value();
-        __ Asr(result, left, Utils::Minimum(value + kSmiTagSize, kCountLimit));
+        __ Asr(result, left,
+            Operand(Utils::Minimum(value + kSmiTagSize, kCountLimit)));
         __ SmiTag(result);
         break;
       }
 
       default:
         UNREACHABLE();
         break;
     }
     return;
   }
@@ skipping 170 matching lines @@
       : NULL;
   ASSERT(locs.in(1).IsConstant());
   const Object& constant = locs.in(1).constant();
   ASSERT(constant.IsSmi());
   // Immediate shift operation takes 5 bits for the count.
   const intptr_t kCountLimit = 0x1F;
   const intptr_t value = Smi::Cast(constant).Value();
   ASSERT((0 < value) && (value < kCountLimit));
   if (shift_left->can_overflow()) {
     // Check for overflow (preserve left).
-    __ Lsl(IP, left, value);
+    __ Lsl(IP, left, Operand(value));
     __ cmp(left, Operand(IP, ASR, value));
     __ b(deopt, NE);  // Overflow.
   }
   // Shift for result now we know there is no overflow.
-  __ Lsl(result, left, value);
+  __ Lsl(result, left, Operand(value));
 }
 
 
 LocationSummary* BinaryInt32OpInstr::MakeLocationSummary(Isolate* isolate,
                                                          bool opt) const {
   const intptr_t kNumInputs = 2;
   // Calculate number of temporaries.
   intptr_t num_temps = 0;
   if (((op_kind() == Token::kSHL) && can_overflow()) ||
       (op_kind() == Token::kSHR)) {
@@ skipping 117 matching lines @@
           __ eor(result, left, o);
         } else {
           __ LoadImmediate(IP, value);
           __ eor(result, left, Operand(IP));
         }
         break;
       }
       case Token::kSHR: {
         // sarl operation masks the count to 5 bits.
         const intptr_t kCountLimit = 0x1F;
-        __ Asr(result, left, Utils::Minimum(value, kCountLimit));
+        __ Asr(result, left, Operand(Utils::Minimum(value, kCountLimit)));
         break;
       }
 
       default:
         UNREACHABLE();
         break;
     }
     return;
   }
 
@@ skipping 646 matching lines @@
 void Simd32x4GetSignMaskInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
   const QRegister value = locs()->in(0).fpu_reg();
   const DRegister dvalue0 = EvenDRegisterOf(value);
   const DRegister dvalue1 = OddDRegisterOf(value);
 
   const Register out = locs()->out(0).reg();
   const Register temp = locs()->temp(0).reg();
 
   // X lane.
   __ vmovrs(out, EvenSRegisterOf(dvalue0));
-  __ Lsr(out, out, 31);
+  __ Lsr(out, out, Operand(31));
   // Y lane.
   __ vmovrs(temp, OddSRegisterOf(dvalue0));
-  __ Lsr(temp, temp, 31);
+  __ Lsr(temp, temp, Operand(31));
   __ orr(out, out, Operand(temp, LSL, 1));
   // Z lane.
   __ vmovrs(temp, EvenSRegisterOf(dvalue1));
-  __ Lsr(temp, temp, 31);
+  __ Lsr(temp, temp, Operand(31));
   __ orr(out, out, Operand(temp, LSL, 2));
   // W lane.
   __ vmovrs(temp, OddSRegisterOf(dvalue1));
-  __ Lsr(temp, temp, 31);
+  __ Lsr(temp, temp, Operand(31));
   __ orr(out, out, Operand(temp, LSL, 3));
   // Tag.
   __ SmiTag(out);
 }
 
 
 LocationSummary* Float32x4ConstructorInstr::MakeLocationSummary(
     Isolate* isolate, bool opt) const {
   const intptr_t kNumInputs = 4;
   const intptr_t kNumTemps = 0;
@@ skipping 521 matching lines @@
   const QRegister q = locs()->in(0).fpu_reg();
 
   if ((op_kind() == MethodRecognizer::kFloat64x2GetSignMask)) {
     const DRegister dvalue0 = EvenDRegisterOf(q);
     const DRegister dvalue1 = OddDRegisterOf(q);
 
     const Register out = locs()->out(0).reg();
 
     // Upper 32-bits of X lane.
     __ vmovrs(out, OddSRegisterOf(dvalue0));
-    __ Lsr(out, out, 31);
+    __ Lsr(out, out, Operand(31));
     // Upper 32-bits of Y lane.
     __ vmovrs(TMP, OddSRegisterOf(dvalue1));
-    __ Lsr(TMP, TMP, 31);
+    __ Lsr(TMP, TMP, Operand(31));
     __ orr(out, out, Operand(TMP, LSL, 1));
     // Tag.
     __ SmiTag(out);
     return;
   }
   ASSERT(representation() == kUnboxedFloat64x2);
   const QRegister r = locs()->out(0).fpu_reg();
 
   const DRegister dvalue0 = EvenDRegisterOf(q);
   const DRegister dvalue1 = OddDRegisterOf(q);
@@ skipping 1606 matching lines @@
       return;
     } else if (shift == 0) {
       // Nothing to do for zero shift amount.
       __ mov(out_lo, Operand(left_lo));
       __ mov(out_hi, Operand(left_hi));
       return;
     }
     switch (op_kind()) {
       case Token::kSHR: {
         if (shift < 32) {
-          __ Lsl(out_lo, left_hi, 32 - shift);
+          __ Lsl(out_lo, left_hi, Operand(32 - shift));
           __ orr(out_lo, out_lo, Operand(left_lo, LSR, shift));
-          __ Asr(out_hi, left_hi, shift);
+          __ Asr(out_hi, left_hi, Operand(shift));
         } else {
           if (shift == 32) {
             __ mov(out_lo, Operand(left_hi));
           } else {
-            __ Asr(out_lo, left_hi, shift - 32);
+            __ Asr(out_lo, left_hi, Operand(shift - 32));
           }
-          __ Asr(out_hi, left_hi, 31);
+          __ Asr(out_hi, left_hi, Operand(31));
         }
         break;
       }
       case Token::kSHL: {
         if (shift < 32) {
-          __ Lsr(out_hi, left_lo, 32 - shift);
+          __ Lsr(out_hi, left_lo, Operand(32 - shift));
           __ orr(out_hi, out_hi, Operand(left_hi, LSL, shift));
-          __ Lsl(out_lo, left_lo, shift);
+          __ Lsl(out_lo, left_lo, Operand(shift));
         } else {
           if (shift == 32) {
             __ mov(out_hi, Operand(left_lo));
           } else {
-            __ Lsl(out_hi, left_lo, shift - 32);
+            __ Lsl(out_hi, left_lo, Operand(shift - 32));
           }
           __ mov(out_lo, Operand(0));
         }
         // Check for overflow.
         if (can_overflow()) {
           // Compare high word from input with shifted high word from output.
           if (shift > 31) {
             __ cmp(left_hi, Operand(out_hi));
           } else {
             __ cmp(left_hi, Operand(out_hi, ASR, shift));
@@ skipping 20 matching lines @@
     }
 
     __ mov(out_lo, Operand(left_lo));
     __ mov(out_hi, Operand(left_hi));
 
     switch (op_kind()) {
       case Token::kSHR: {
         __ cmp(shift, Operand(32));
 
         __ mov(out_lo, Operand(out_hi), HI);
-        __ Asr(out_hi, out_hi, 31, HI);
+        __ Asr(out_hi, out_hi, Operand(31), HI);
         __ sub(shift, shift, Operand(32), HI);
 
         __ rsb(IP, shift, Operand(32));
         __ mov(IP, Operand(out_hi, LSL, IP));
         __ orr(out_lo, IP, Operand(out_lo, LSR, shift));
         __ Asr(out_hi, out_hi, shift);
         break;
       }
       case Token::kSHL: {
         __ rsbs(IP, shift, Operand(32));
@@ skipping 157 matching lines @@
     } else if (shift_value < 0) {
       // Invalid shift value.
       __ b(deopt);
     } else if (shift_value > kShifterLimit) {
       // Result is 0.
       __ eor(out, out, Operand(out));
     } else {
       // Do the shift: (shift_value > 0) && (shift_value <= kShifterLimit).
       switch (op_kind()) {
         case Token::kSHR:
-          __ Lsr(out, left, shift_value);
+          __ Lsr(out, left, Operand(shift_value));
           break;
         case Token::kSHL:
-          __ Lsl(out, left, shift_value);
+          __ Lsl(out, left, Operand(shift_value));
           break;
         default:
           UNREACHABLE();
       }
     }
     return;
   }
 
   // Non constant shift value.
-
   Register shifter = locs()->in(1).reg();
 
   __ mov(temp, Operand(shifter));
   __ SmiUntag(temp);
   __ CompareImmediate(temp, 0);
   // If shift value is < 0, deoptimize.
   __ b(deopt, LT);
   __ CompareImmediate(temp, kShifterLimit);
   // > kShifterLimit, result is 0.
   __ eor(out, out, Operand(out), HI);
@@ skipping 73 matching lines @@
       __ TestImmediate(value, 0xC0000000);
     }
     __ b(&done, EQ);
     BoxAllocationSlowPath::Allocate(
         compiler,
         this,
         compiler->mint_class(),
         out,
         temp);
     if (from_representation() == kUnboxedInt32) {
-      __ Asr(temp, value, kBitsPerWord - 1);
+      __ Asr(temp, value, Operand(kBitsPerWord - 1));
     } else {
       ASSERT(from_representation() == kUnboxedUint32);
       __ eor(temp, temp, Operand(temp));
     }
     __ StoreToOffset(kWord,
                      value,
                      out,
                      Mint::value_offset() - kHeapObjectTag);
     __ StoreToOffset(kWord,
                      temp,
@@ skipping 363 matching lines @@
   compiler->GenerateCall(token_pos(), &label, stub_kind_, locs());
 #if defined(DEBUG)
   __ LoadImmediate(R4, kInvalidObjectPointer);
   __ LoadImmediate(R5, kInvalidObjectPointer);
 #endif
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM