Expands the use of Immediate and Operand wrappers.

runtime/vm/assembler_arm.h

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #ifndef VM_ASSEMBLER_ARM_H_
 #define VM_ASSEMBLER_ARM_H_
 
 #ifndef VM_ASSEMBLER_H_
 #error Do not include assembler_arm.h directly; use assembler.h instead.
 #endif
@@ skipping 213 matching lines @@
     ASSERT(Utils::IsAbsoluteUint(12, offset));
     kind_ = Immediate;
     if (offset < 0) {
       encoding_ = (am ^ (1 << kUShift)) | -offset;  // Flip U to adjust sign.
     } else {
       encoding_ = am | offset;
     }
     encoding_ |= static_cast<uint32_t>(rn) << kRnShift;
   }
 
+  // There is no register offset mode unless Mode is Offset, in which case the
+  // shifted register case below should be used.
+  Address(Register rn, Register r, Mode am) {
+    UNREACHABLE();
+  }
+
   Address(Register rn, Register rm,
           Shift shift = LSL, uint32_t shift_imm = 0, Mode am = Offset) {
     Operand o(rm, shift, shift_imm);
 
     if ((shift == LSL) && (shift_imm == 0)) {
       kind_ = IndexRegister;
     } else {
       kind_ = ScaledIndexRegister;
     }
     encoding_ = o.encoding() | am | (static_cast<uint32_t>(rn) << kRnShift);
   }
 
+  // There is no shifted register mode with a register shift.
+  Address(Register rn, Register rm, Shift shift, Register r, Mode am = Offset) {
+    UNREACHABLE();
+  }
+
   static OperandSize OperandSizeFor(intptr_t cid);
 
   static bool CanHoldLoadOffset(OperandSize size,
                                 int32_t offset,
                                 int32_t* offset_mask);
   static bool CanHoldStoreOffset(OperandSize size,
                                  int32_t offset,
                                  int32_t* offset_mask);
   static bool CanHoldImmediateOffset(bool is_load,
                                      intptr_t cid,
@@ skipping 16 matching lines @@
 
   friend class Assembler;
 };
 
 
 class FieldAddress : public Address {
  public:
   FieldAddress(Register base, int32_t disp)
       : Address(base, disp - kHeapObjectTag) { }
 
+  FieldAddress(Register base, Register r) : Address(base) {
+    UNREACHABLE();
+  }
+
   FieldAddress(const FieldAddress& other) : Address(other) { }
 
   FieldAddress& operator=(const FieldAddress& other) {
     Address::operator=(other);
     return *this;
   }
 };
 
 
 class Assembler : public ValueObject {
@@ skipping 97 matching lines @@
   void movs(Register rd, Operand o, Condition cond = AL);
 
   void bic(Register rd, Register rn, Operand o, Condition cond = AL);
   void bics(Register rd, Register rn, Operand o, Condition cond = AL);
 
   void mvn(Register rd, Operand o, Condition cond = AL);
   void mvns(Register rd, Operand o, Condition cond = AL);
 
   // Miscellaneous data-processing instructions.
   void clz(Register rd, Register rm, Condition cond = AL);
-  void movw(Register rd, uint16_t imm16, Condition cond = AL);
-  void movt(Register rd, uint16_t imm16, Condition cond = AL);
 
   // Multiply instructions.
   void mul(Register rd, Register rn, Register rm, Condition cond = AL);
   void muls(Register rd, Register rn, Register rm, Condition cond = AL);
   void mla(Register rd, Register rn, Register rm, Register ra,
            Condition cond = AL);
   void mls(Register rd, Register rn, Register rm, Register ra,
            Condition cond = AL);
   void smull(Register rd_lo, Register rd_hi, Register rn, Register rm,
              Condition cond = AL);
@@ skipping 164 matching lines @@
   void BranchPatchable(const ExternalLabel* label);
 
   // Branch and link to an entry address. Call sequence is never patched.
   void BranchLink(const ExternalLabel* label);
 
   // Branch and link to an entry address. Call sequence can be patched.
   void BranchLinkPatchable(const ExternalLabel* label);
 
   // Branch and link to [base + offset]. Call sequence is never patched.
   void BranchLinkOffset(Register base, int32_t offset);
+  void BranchLinkOffset(Register base, Register r) {
+    UNREACHABLE();
+  }
 
   // Add signed immediate value to rd. May clobber IP.
   void AddImmediate(Register rd, int32_t value, Condition cond = AL);
   void AddImmediate(Register rd, Register rn, int32_t value,
                     Condition cond = AL);
   void AddImmediateSetFlags(Register rd, Register rn, int32_t value,
                             Condition cond = AL);
   void SubImmediateSetFlags(Register rd, Register rn, int32_t value,
                             Condition cond = AL);
   void AndImmediate(Register rd, Register rs, int32_t imm, Condition cond = AL);
@@ skipping 112 matching lines @@
   void Push(Register rd, Condition cond = AL);
   void Pop(Register rd, Condition cond = AL);
 
   void PushList(RegList regs, Condition cond = AL);
   void PopList(RegList regs, Condition cond = AL);
 
   void MoveRegister(Register rd, Register rm, Condition cond = AL);
 
   // Convenience shift instructions. Use mov instruction with shifter operand
   // for variants setting the status flags.
-  void Lsl(Register rd, Register rm, uint32_t shift_imm, Condition cond = AL);
+  void Lsl(Register rd, Register rm, const Operand& shift_imm,
+           Condition cond = AL);
   void Lsl(Register rd, Register rm, Register rs, Condition cond = AL);
-  void Lsr(Register rd, Register rm, uint32_t shift_imm, Condition cond = AL);
+  void Lsr(Register rd, Register rm, const Operand& shift_imm,
+           Condition cond = AL);
   void Lsr(Register rd, Register rm, Register rs, Condition cond = AL);
-  void Asr(Register rd, Register rm, uint32_t shift_imm, Condition cond = AL);
+  void Asr(Register rd, Register rm, const Operand& shift_imm,
+           Condition cond = AL);
   void Asr(Register rd, Register rm, Register rs, Condition cond = AL);
-  void Asrs(Register rd, Register rm, uint32_t shift_imm, Condition cond = AL);
-  void Ror(Register rd, Register rm, uint32_t shift_imm, Condition cond = AL);
+  void Asrs(Register rd, Register rm, const Operand& shift_imm,
+            Condition cond = AL);
+  void Ror(Register rd, Register rm, const Operand& shift_imm,
+           Condition cond = AL);
   void Ror(Register rd, Register rm, Register rs, Condition cond = AL);
   void Rrx(Register rd, Register rm, Condition cond = AL);
 
   // Fill rd with the sign of rm.
   void SignFill(Register rd, Register rm, Condition cond = AL);
 
   void Vreciprocalqs(QRegister qd, QRegister qm);
   void VreciprocalSqrtqs(QRegister qd, QRegister qm);
   // If qm must be preserved, then provide a (non-QTMP) temporary.
   void Vsqrtqs(QRegister qd, QRegister qm, QRegister temp);
   void Vdivqs(QRegister qd, QRegister qn, QRegister qm);
 
   void SmiTag(Register reg, Condition cond = AL) {
-    Lsl(reg, reg, kSmiTagSize, cond);
+    Lsl(reg, reg, Operand(kSmiTagSize), cond);
   }
 
   void SmiTag(Register dst, Register src, Condition cond = AL) {
-    Lsl(dst, src, kSmiTagSize, cond);
+    Lsl(dst, src, Operand(kSmiTagSize), cond);
   }
 
   void SmiUntag(Register reg, Condition cond = AL) {
-    Asr(reg, reg, kSmiTagSize, cond);
+    Asr(reg, reg, Operand(kSmiTagSize), cond);
   }
 
   void SmiUntag(Register dst, Register src, Condition cond = AL) {
-    Asr(dst, src, kSmiTagSize, cond);
+    Asr(dst, src, Operand(kSmiTagSize), cond);
   }
 
   // Untag the value in the register assuming it is a smi.
   // Untagging shifts tag bit into the carry flag - if carry is clear
   // assumption was correct. In this case jump to the is_smi label.
   // Otherwise fall-through.
   void SmiUntag(Register dst, Register src, Label* is_smi) {
     ASSERT(kSmiTagSize == 1);
-    Asrs(dst, src, kSmiTagSize);
+    Asrs(dst, src, Operand(kSmiTagSize));
     b(is_smi, CC);
   }
 
   // Function frame setup and tear down.
   void EnterFrame(RegList regs, intptr_t frame_space);
   void LeaveFrame(RegList regs);
   void Ret();
   void ReserveAlignedFrameSpace(intptr_t frame_space);
 
   // Create a frame for calling into runtime that preserves all volatile
@@ skipping 83 matching lines @@
     allow_constant_pool_ = b;
   }
 
  private:
   AssemblerBuffer buffer_;  // Contains position independent code.
   GrowableObjectArray& object_pool_;  // Objects and patchable jump targets.
   int32_t prologue_offset_;
 
   bool use_far_branches_;
 
+  // If you are thinking of using one or both of these instructions directly,
+  // instead LoadImmediate should probably be used.
+  void movw(Register rd, uint16_t imm16, Condition cond = AL);
+  void movt(Register rd, uint16_t imm16, Condition cond = AL);
+
   int32_t AddObject(const Object& obj);
   int32_t AddExternalLabel(const ExternalLabel* label);
 
   void BindARMv6(Label* label);
   void BindARMv7(Label* label);
 
   class CodeComment : public ZoneAllocated {
    public:
     CodeComment(intptr_t pc_offset, const String& comment)
         : pc_offset_(pc_offset), comment_(comment) { }
@@ skipping 120 matching lines @@
                                   Register value,
                                   Label* no_update);
 
   DISALLOW_ALLOCATION();
   DISALLOW_COPY_AND_ASSIGN(Assembler);
 };
 
 }  // namespace dart
 
 #endif  // VM_ASSEMBLER_ARM_H_