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Side by Side Diff: src/compiler/ia32/instruction-selector-ia32.cc

Issue 591343002: [turbofan] IA: support better left operand for commutative binops (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: addressed comments Created 6 years, 2 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/instruction-selector-impl.h" 5 #include "src/compiler/instruction-selector-impl.h"
6 #include "src/compiler/node-matchers.h" 6 #include "src/compiler/node-matchers.h"
7 #include "src/compiler/node-properties-inl.h" 7 #include "src/compiler/node-properties-inl.h"
8 8
9 namespace v8 { 9 namespace v8 {
10 namespace internal { 10 namespace internal {
(...skipping 19 matching lines...) Expand all
30 case IrOpcode::kHeapConstant: { 30 case IrOpcode::kHeapConstant: {
31 // Constants in new space cannot be used as immediates in V8 because 31 // Constants in new space cannot be used as immediates in V8 because
32 // the GC does not scan code objects when collecting the new generation. 32 // the GC does not scan code objects when collecting the new generation.
33 Unique<HeapObject> value = OpParameter<Unique<HeapObject> >(node); 33 Unique<HeapObject> value = OpParameter<Unique<HeapObject> >(node);
34 return !isolate()->heap()->InNewSpace(*value.handle()); 34 return !isolate()->heap()->InNewSpace(*value.handle());
35 } 35 }
36 default: 36 default:
37 return false; 37 return false;
38 } 38 }
39 } 39 }
40
41 bool CanBeBetterLeftOperand(Node* node) const {
42 return !selector()->IsLive(node);
43 }
40 }; 44 };
41 45
42 46
43 void InstructionSelector::VisitLoad(Node* node) { 47 void InstructionSelector::VisitLoad(Node* node) {
44 MachineType rep = RepresentationOf(OpParameter<LoadRepresentation>(node)); 48 MachineType rep = RepresentationOf(OpParameter<LoadRepresentation>(node));
45 MachineType typ = TypeOf(OpParameter<LoadRepresentation>(node)); 49 MachineType typ = TypeOf(OpParameter<LoadRepresentation>(node));
46 IA32OperandGenerator g(this); 50 IA32OperandGenerator g(this);
47 Node* base = node->InputAt(0); 51 Node* base = node->InputAt(0);
48 Node* index = node->InputAt(1); 52 Node* index = node->InputAt(1);
49 53
(...skipping 109 matching lines...) Expand 10 before | Expand all | Expand 10 after
159 } 163 }
160 // TODO(turbofan): addressing modes [r+r*{2,4,8}+K] 164 // TODO(turbofan): addressing modes [r+r*{2,4,8}+K]
161 } 165 }
162 166
163 167
164 // Shared routine for multiple binary operations. 168 // Shared routine for multiple binary operations.
165 static void VisitBinop(InstructionSelector* selector, Node* node, 169 static void VisitBinop(InstructionSelector* selector, Node* node,
166 InstructionCode opcode, FlagsContinuation* cont) { 170 InstructionCode opcode, FlagsContinuation* cont) {
167 IA32OperandGenerator g(selector); 171 IA32OperandGenerator g(selector);
168 Int32BinopMatcher m(node); 172 Int32BinopMatcher m(node);
173 Node* left = m.left().node();
174 Node* right = m.right().node();
169 InstructionOperand* inputs[4]; 175 InstructionOperand* inputs[4];
170 size_t input_count = 0; 176 size_t input_count = 0;
171 InstructionOperand* outputs[2]; 177 InstructionOperand* outputs[2];
172 size_t output_count = 0; 178 size_t output_count = 0;
173 179
174 // TODO(turbofan): match complex addressing modes. 180 // TODO(turbofan): match complex addressing modes.
175 // TODO(turbofan): if commutative, pick the non-live-in operand as the left as 181 if (g.CanBeImmediate(right)) {
176 // this might be the last use and therefore its register can be reused. 182 inputs[input_count++] = g.Use(left);
177 if (g.CanBeImmediate(m.right().node())) { 183 inputs[input_count++] = g.UseImmediate(right);
178 inputs[input_count++] = g.Use(m.left().node());
179 inputs[input_count++] = g.UseImmediate(m.right().node());
180 } else { 184 } else {
181 inputs[input_count++] = g.UseRegister(m.left().node()); 185 if (node->op()->HasProperty(Operator::kCommutative) &&
182 inputs[input_count++] = g.Use(m.right().node()); 186 g.CanBeBetterLeftOperand(right)) {
187 std::swap(left, right);
188 }
189 inputs[input_count++] = g.UseRegister(left);
190 inputs[input_count++] = g.Use(right);
183 } 191 }
184 192
185 if (cont->IsBranch()) { 193 if (cont->IsBranch()) {
186 inputs[input_count++] = g.Label(cont->true_block()); 194 inputs[input_count++] = g.Label(cont->true_block());
187 inputs[input_count++] = g.Label(cont->false_block()); 195 inputs[input_count++] = g.Label(cont->false_block());
188 } 196 }
189 197
190 outputs[output_count++] = g.DefineSameAsFirst(node); 198 outputs[output_count++] = g.DefineSameAsFirst(node);
191 if (cont->IsSet()) { 199 if (cont->IsSet()) {
192 // TODO(turbofan): Use byte register here. 200 // TODO(turbofan): Use byte register here.
(...skipping 96 matching lines...) Expand 10 before | Expand all | Expand 10 after
289 if (m.left().Is(0)) { 297 if (m.left().Is(0)) {
290 Emit(kIA32Neg, g.DefineSameAsFirst(node), g.Use(m.right().node())); 298 Emit(kIA32Neg, g.DefineSameAsFirst(node), g.Use(m.right().node()));
291 } else { 299 } else {
292 VisitBinop(this, node, kIA32Sub); 300 VisitBinop(this, node, kIA32Sub);
293 } 301 }
294 } 302 }
295 303
296 304
297 void InstructionSelector::VisitInt32Mul(Node* node) { 305 void InstructionSelector::VisitInt32Mul(Node* node) {
298 IA32OperandGenerator g(this); 306 IA32OperandGenerator g(this);
299 Node* left = node->InputAt(0); 307 Int32BinopMatcher m(node);
300 Node* right = node->InputAt(1); 308 Node* left = m.left().node();
309 Node* right = m.right().node();
301 if (g.CanBeImmediate(right)) { 310 if (g.CanBeImmediate(right)) {
302 Emit(kIA32Imul, g.DefineAsRegister(node), g.Use(left), 311 Emit(kIA32Imul, g.DefineAsRegister(node), g.Use(left),
303 g.UseImmediate(right)); 312 g.UseImmediate(right));
304 } else if (g.CanBeImmediate(left)) {
305 Emit(kIA32Imul, g.DefineAsRegister(node), g.Use(right),
306 g.UseImmediate(left));
307 } else { 313 } else {
308 // TODO(turbofan): select better left operand. 314 if (g.CanBeBetterLeftOperand(right)) {
315 std::swap(left, right);
316 }
309 Emit(kIA32Imul, g.DefineSameAsFirst(node), g.UseRegister(left), 317 Emit(kIA32Imul, g.DefineSameAsFirst(node), g.UseRegister(left),
310 g.Use(right)); 318 g.Use(right));
311 } 319 }
312 } 320 }
313 321
314 322
315 static inline void VisitDiv(InstructionSelector* selector, Node* node, 323 static inline void VisitDiv(InstructionSelector* selector, Node* node,
316 ArchOpcode opcode) { 324 ArchOpcode opcode) {
317 IA32OperandGenerator g(selector); 325 IA32OperandGenerator g(selector);
318 InstructionOperand* temps[] = {g.TempRegister(edx)}; 326 InstructionOperand* temps[] = {g.TempRegister(edx)};
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548 call_instr->MarkAsCall(); 556 call_instr->MarkAsCall();
549 if (deoptimization != NULL) { 557 if (deoptimization != NULL) {
550 DCHECK(continuation != NULL); 558 DCHECK(continuation != NULL);
551 call_instr->MarkAsControl(); 559 call_instr->MarkAsControl();
552 } 560 }
553 } 561 }
554 562
555 } // namespace compiler 563 } // namespace compiler
556 } // namespace internal 564 } // namespace internal
557 } // namespace v8 565 } // namespace v8
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