Version 0.8.10.4

dart/runtime/vm/intermediate_language_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_ARM.
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/intermediate_language.h"
 
 #include "vm/dart_entry.h"
@@ skipping 961 matching lines @@
   switch (class_id_) {
     case kArrayCid:
     case kImmutableArrayCid:
       return CompileType::Dynamic();
 
     case kTypedDataFloat32ArrayCid:
     case kTypedDataFloat64ArrayCid:
       return CompileType::FromCid(kDoubleCid);
     case kTypedDataFloat32x4ArrayCid:
       return CompileType::FromCid(kFloat32x4Cid);
-    case kTypedDataUint32x4ArrayCid:
-      return CompileType::FromCid(kUint32x4Cid);
+    case kTypedDataInt32x4ArrayCid:
+      return CompileType::FromCid(kInt32x4Cid);
 
     case kTypedDataInt8ArrayCid:
     case kTypedDataUint8ArrayCid:
     case kTypedDataUint8ClampedArrayCid:
     case kExternalTypedDataUint8ArrayCid:
     case kExternalTypedDataUint8ClampedArrayCid:
     case kTypedDataInt16ArrayCid:
     case kTypedDataUint16ArrayCid:
     case kOneByteStringCid:
     case kTwoByteStringCid:
@@ skipping 29 matching lines @@
     case kTwoByteStringCid:
       return kTagged;
     case kTypedDataInt32ArrayCid:
     case kTypedDataUint32ArrayCid:
       // Instruction can deoptimize if we optimistically assumed that the result
       // fits into Smi.
       return CanDeoptimize() ? kTagged : kUnboxedMint;
     case kTypedDataFloat32ArrayCid:
     case kTypedDataFloat64ArrayCid:
       return kUnboxedDouble;
-    case kTypedDataUint32x4ArrayCid:
-      return kUnboxedUint32x4;
+    case kTypedDataInt32x4ArrayCid:
+      return kUnboxedInt32x4;
     case kTypedDataFloat32x4ArrayCid:
       return kUnboxedFloat32x4;
     default:
       UNREACHABLE();
       return kTagged;
   }
 }
 
 
 LocationSummary* LoadIndexedInstr::MakeLocationSummary() const {
   const intptr_t kNumInputs = 2;
   const intptr_t kNumTemps = 0;
   LocationSummary* locs =
       new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
   locs->set_in(0, Location::RequiresRegister());
   // The smi index is either untagged (element size == 1), or it is left smi
   // tagged (for all element sizes > 1).
   // TODO(regis): Revisit and see if the index can be immediate.
   locs->set_in(1, Location::WritableRegister());
   if ((representation() == kUnboxedDouble) ||
       (representation() == kUnboxedFloat32x4) ||
-      (representation() == kUnboxedUint32x4)) {
+      (representation() == kUnboxedInt32x4)) {
     locs->set_out(Location::RequiresFpuRegister());
   } else {
     locs->set_out(Location::RequiresRegister());
   }
   return locs;
 }
 
 
 void LoadIndexedInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
   Register array = locs()->in(0).reg();
@@ skipping 32 matching lines @@
   if (!IsExternal()) {
     ASSERT(this->array()->definition()->representation() == kTagged);
     __ AddImmediate(index.reg(),
         FlowGraphCompiler::DataOffsetFor(class_id()) - kHeapObjectTag);
   }
   element_address = Address(array, index.reg(), LSL, 0);
 
   if ((representation() == kUnboxedDouble) ||
       (representation() == kUnboxedMint) ||
       (representation() == kUnboxedFloat32x4) ||
-      (representation() == kUnboxedUint32x4)) {
+      (representation() == kUnboxedInt32x4)) {
     QRegister result = locs()->out().fpu_reg();
     DRegister dresult0 = EvenDRegisterOf(result);
     DRegister dresult1 = OddDRegisterOf(result);
     switch (class_id()) {
       case kTypedDataInt32ArrayCid:
         UNIMPLEMENTED();
         break;
       case kTypedDataUint32ArrayCid:
         UNIMPLEMENTED();
         break;
       case kTypedDataFloat32ArrayCid:
         // Load single precision float and promote to double.
         // vldrs does not support indexed addressing.
         __ add(index.reg(), index.reg(), ShifterOperand(array));
         element_address = Address(index.reg(), 0);
         __ vldrs(STMP, element_address);
         __ vcvtds(dresult0, STMP);
         break;
       case kTypedDataFloat64ArrayCid:
         // vldrd does not support indexed addressing.
         __ add(index.reg(), index.reg(), ShifterOperand(array));
         element_address = Address(index.reg(), 0);
         __ vldrd(dresult0, element_address);
         break;
-      case kTypedDataUint32x4ArrayCid:
+      case kTypedDataInt32x4ArrayCid:
       case kTypedDataFloat32x4ArrayCid:
         __ add(index.reg(), index.reg(), ShifterOperand(array));
         __ LoadDFromOffset(dresult0, index.reg(), 0);
         __ LoadDFromOffset(dresult1, index.reg(), 2*kWordSize);
         break;
     }
     return;
   }
 
   Register result = locs()->out().reg();
@@ skipping 65 matching lines @@
     case kTypedDataUint16ArrayCid:
       return kTagged;
     case kTypedDataInt32ArrayCid:
     case kTypedDataUint32ArrayCid:
       return value()->IsSmiValue() ? kTagged : kUnboxedMint;
     case kTypedDataFloat32ArrayCid:
     case kTypedDataFloat64ArrayCid:
       return kUnboxedDouble;
     case kTypedDataFloat32x4ArrayCid:
       return kUnboxedFloat32x4;
-    case kTypedDataUint32x4ArrayCid:
-      return kUnboxedUint32x4;
+    case kTypedDataInt32x4ArrayCid:
+      return kUnboxedInt32x4;
     default:
       UNREACHABLE();
       return kTagged;
   }
 }
 
 
 LocationSummary* StoreIndexedInstr::MakeLocationSummary() const {
   const intptr_t kNumInputs = 3;
   const intptr_t kNumTemps = 0;
@@ skipping 17 matching lines @@
     case kTypedDataUint8ClampedArrayCid:
     case kOneByteStringCid:
     case kTypedDataInt16ArrayCid:
     case kTypedDataUint16ArrayCid:
     case kTypedDataInt32ArrayCid:
     case kTypedDataUint32ArrayCid:
       locs->set_in(2, Location::WritableRegister());
       break;
     case kTypedDataFloat32ArrayCid:
     case kTypedDataFloat64ArrayCid:  // TODO(srdjan): Support Float64 constants.
-    case kTypedDataUint32x4ArrayCid:
+    case kTypedDataInt32x4ArrayCid:
     case kTypedDataFloat32x4ArrayCid:
       locs->set_in(2, Location::RequiresFpuRegister());
       break;
     default:
       UNREACHABLE();
       return NULL;
   }
   return locs;
 }
 
@@ skipping 120 matching lines @@
       __ add(index.reg(), index.reg(), ShifterOperand(array));
       __ StoreSToOffset(STMP, index.reg(), 0);
       break;
     }
     case kTypedDataFloat64ArrayCid: {
       DRegister in2 = EvenDRegisterOf(locs()->in(2).fpu_reg());
       __ add(index.reg(), index.reg(), ShifterOperand(array));
       __ StoreDToOffset(in2, index.reg(), 0);
       break;
     }
-    case kTypedDataUint32x4ArrayCid:
+    case kTypedDataInt32x4ArrayCid:
     case kTypedDataFloat32x4ArrayCid: {
       QRegister in = locs()->in(2).fpu_reg();
       DRegister din0 = EvenDRegisterOf(in);
       DRegister din1 = OddDRegisterOf(in);
       __ add(index.reg(), index.reg(), ShifterOperand(array));
       __ StoreDToOffset(din0, index.reg(), 0);
       __ StoreDToOffset(din1, index.reg(), 2*kWordSize);
       break;
     }
     default:
@@ skipping 105 matching lines @@
           Label check_array, length_compared, no_fixed_length;
           // If length is negative the length guard is either disabled or
           // has not been initialized, either way it is safe to skip the
           // length check.
           __ ldr(IP, field_length_operand);
           __ CompareImmediate(IP, 0);
           __ b(&skip_length_check, LT);
           __ CompareImmediate(value_cid_reg, kNullCid);
           __ b(&no_fixed_length, EQ);
           // Check for typed data array.
-          __ CompareImmediate(value_cid_reg, kTypedDataUint32x4ArrayCid);
+          __ CompareImmediate(value_cid_reg, kTypedDataInt32x4ArrayCid);
           __ b(&no_fixed_length, GT);
           __ CompareImmediate(value_cid_reg, kTypedDataInt8ArrayCid);
           // Could still be a regular array.
           __ b(&check_array, LT);
           __ ldr(temp_reg,
                  FieldAddress(value_reg, TypedData::length_offset()));
           __ ldr(IP, field_length_operand);
           __ cmp(temp_reg, ShifterOperand(IP));
           __ b(&length_compared);
           // Check for regular array.
@@ skipping 59 matching lines @@
     __ b(fail, NE);
 
     if (value_cid == kDynamicCid) {
       __ str(value_cid_reg, field_cid_operand);
       __ str(value_cid_reg, field_nullability_operand);
       if (field_has_length) {
         Label check_array, length_set, no_fixed_length;
         __ CompareImmediate(value_cid_reg, kNullCid);
         __ b(&no_fixed_length, EQ);
         // Check for typed data array.
-        __ CompareImmediate(value_cid_reg, kTypedDataUint32x4ArrayCid);
+        __ CompareImmediate(value_cid_reg, kTypedDataInt32x4ArrayCid);
         __ b(&no_fixed_length, GT);
         __ CompareImmediate(value_cid_reg, kTypedDataInt8ArrayCid);
         // Could still be a regular array.
         __ b(&check_array, LT);
         // Destroy value_cid_reg (safe because we are finished with it).
         __ ldr(value_cid_reg,
                FieldAddress(value_reg, TypedData::length_offset()));
         __ str(value_cid_reg, field_length_operand);
         __ b(&length_set);  // Updated field length typed data array.
         // Check for regular array.
@@ skipping 1262 matching lines @@
 
   const DRegister result_even = EvenDRegisterOf(result);
   const DRegister result_odd = OddDRegisterOf(result);
   __ LoadDFromOffset(result_even, value,
       Float32x4::value_offset() - kHeapObjectTag);
   __ LoadDFromOffset(result_odd, value,
       Float32x4::value_offset() + 2*kWordSize - kHeapObjectTag);
 }
 
 
-LocationSummary* BoxUint32x4Instr::MakeLocationSummary() const {
+LocationSummary* BoxInt32x4Instr::MakeLocationSummary() const {
   const intptr_t kNumInputs = 1;
   const intptr_t kNumTemps = 0;
   LocationSummary* summary =
       new LocationSummary(kNumInputs,
                           kNumTemps,
                           LocationSummary::kCallOnSlowPath);
   summary->set_in(0, Location::RequiresFpuRegister());
   summary->set_out(Location::RequiresRegister());
   return summary;
 }
 
 
-class BoxUint32x4SlowPath : public SlowPathCode {
+class BoxInt32x4SlowPath : public SlowPathCode {
  public:
-  explicit BoxUint32x4SlowPath(BoxUint32x4Instr* instruction)
+  explicit BoxInt32x4SlowPath(BoxInt32x4Instr* instruction)
       : instruction_(instruction) { }
 
   virtual void EmitNativeCode(FlowGraphCompiler* compiler) {
-    __ Comment("BoxUint32x4SlowPath");
+    __ Comment("BoxInt32x4SlowPath");
     __ Bind(entry_label());
-    const Class& uint32x4_class = compiler->uint32x4_class();
+    const Class& int32x4_class = compiler->int32x4_class();
     const Code& stub =
-        Code::Handle(StubCode::GetAllocationStubForClass(uint32x4_class));
-    const ExternalLabel label(uint32x4_class.ToCString(), stub.EntryPoint());
+        Code::Handle(StubCode::GetAllocationStubForClass(int32x4_class));
+    const ExternalLabel label(int32x4_class.ToCString(), stub.EntryPoint());
 
     LocationSummary* locs = instruction_->locs();
     locs->live_registers()->Remove(locs->out());
 
     compiler->SaveLiveRegisters(locs);
     compiler->GenerateCall(Scanner::kDummyTokenIndex,  // No token position.
                            &label,
                            PcDescriptors::kOther,
                            locs);
     __ mov(locs->out().reg(), ShifterOperand(R0));
     compiler->RestoreLiveRegisters(locs);
 
     __ b(exit_label());
   }
 
  private:
-  BoxUint32x4Instr* instruction_;
+  BoxInt32x4Instr* instruction_;
 };
 
 
-void BoxUint32x4Instr::EmitNativeCode(FlowGraphCompiler* compiler) {
-  BoxUint32x4SlowPath* slow_path = new BoxUint32x4SlowPath(this);
+void BoxInt32x4Instr::EmitNativeCode(FlowGraphCompiler* compiler) {
+  BoxInt32x4SlowPath* slow_path = new BoxInt32x4SlowPath(this);
   compiler->AddSlowPathCode(slow_path);
 
   Register out_reg = locs()->out().reg();
   QRegister value = locs()->in(0).fpu_reg();
   DRegister value_even = EvenDRegisterOf(value);
   DRegister value_odd = OddDRegisterOf(value);
 
-  __ TryAllocate(compiler->uint32x4_class(),
+  __ TryAllocate(compiler->int32x4_class(),
                  slow_path->entry_label(),
                  out_reg);
   __ Bind(slow_path->exit_label());
   __ StoreDToOffset(value_even, out_reg,
-      Uint32x4::value_offset() - kHeapObjectTag);
+      Int32x4::value_offset() - kHeapObjectTag);
   __ StoreDToOffset(value_odd, out_reg,
-      Uint32x4::value_offset() + 2*kWordSize - kHeapObjectTag);
+      Int32x4::value_offset() + 2*kWordSize - kHeapObjectTag);
 }
 
 
-LocationSummary* UnboxUint32x4Instr::MakeLocationSummary() const {
+LocationSummary* UnboxInt32x4Instr::MakeLocationSummary() const {
   const intptr_t value_cid = value()->Type()->ToCid();
   const intptr_t kNumInputs = 1;
-  const intptr_t kNumTemps = value_cid == kUint32x4Cid ? 0 : 1;
+  const intptr_t kNumTemps = value_cid == kInt32x4Cid ? 0 : 1;
   LocationSummary* summary =
       new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
   summary->set_in(0, Location::RequiresRegister());
   if (kNumTemps > 0) {
     ASSERT(kNumTemps == 1);
     summary->set_temp(0, Location::RequiresRegister());
   }
   summary->set_out(Location::RequiresFpuRegister());
   return summary;
 }
 
 
-void UnboxUint32x4Instr::EmitNativeCode(FlowGraphCompiler* compiler) {
+void UnboxInt32x4Instr::EmitNativeCode(FlowGraphCompiler* compiler) {
   const intptr_t value_cid = value()->Type()->ToCid();
   const Register value = locs()->in(0).reg();
   const QRegister result = locs()->out().fpu_reg();
 
-  if (value_cid != kUint32x4Cid) {
+  if (value_cid != kInt32x4Cid) {
     const Register temp = locs()->temp(0).reg();
     Label* deopt = compiler->AddDeoptStub(deopt_id_, kDeoptCheckClass);
     __ tst(value, ShifterOperand(kSmiTagMask));
     __ b(deopt, EQ);
-    __ CompareClassId(value, kUint32x4Cid, temp);
+    __ CompareClassId(value, kInt32x4Cid, temp);
     __ b(deopt, NE);
   }
 
   const DRegister result_even = EvenDRegisterOf(result);
   const DRegister result_odd = OddDRegisterOf(result);
   __ LoadDFromOffset(result_even, value,
-      Uint32x4::value_offset() - kHeapObjectTag);
+      Int32x4::value_offset() - kHeapObjectTag);
   __ LoadDFromOffset(result_odd, value,
-      Uint32x4::value_offset() + 2*kWordSize - kHeapObjectTag);
+      Int32x4::value_offset() + 2*kWordSize - kHeapObjectTag);
 }
 
 
 LocationSummary* BinaryDoubleOpInstr::MakeLocationSummary() const {
   const intptr_t kNumInputs = 2;
   const intptr_t kNumTemps = 0;
   LocationSummary* summary =
       new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
   summary->set_in(0, Location::RequiresFpuRegister());
   summary->set_in(1, Location::RequiresFpuRegister());
@@ skipping 84 matching lines @@
       __ vcvtds(dresult0, sresult0);
       break;
     case MethodRecognizer::kFloat32x4ShuffleZ:
       __ vdup(kWord, result, dvalue1, 0);
       __ vcvtds(dresult0, sresult0);
       break;
     case MethodRecognizer::kFloat32x4ShuffleW:
       __ vdup(kWord, result, dvalue1, 1);
       __ vcvtds(dresult0, sresult0);
       break;
-    case MethodRecognizer::kUint32x4Shuffle:
+    case MethodRecognizer::kInt32x4Shuffle:
     case MethodRecognizer::kFloat32x4Shuffle:
       if (mask_ == 0x00) {
         __ vdup(kWord, result, dvalue0, 0);
       } else if (mask_ == 0x55) {
         __ vdup(kWord, result, dvalue0, 1);
       } else if (mask_ == 0xAA) {
         __ vdup(kWord, result, dvalue1, 0);
       } else  if (mask_ == 0xFF) {
         __ vdup(kWord, result, dvalue1, 1);
       } else {
@@ skipping 43 matching lines @@
   SRegister sresult2 = EvenSRegisterOf(dresult1);
   SRegister sresult3 = OddSRegisterOf(dresult1);
 
   DRegister dleft0 = EvenDRegisterOf(left);
   DRegister dleft1 = OddDRegisterOf(left);
   DRegister dright0 = EvenDRegisterOf(right);
   DRegister dright1 = OddDRegisterOf(right);
 
   switch (op_kind()) {
     case MethodRecognizer::kFloat32x4ShuffleMix:
-    case MethodRecognizer::kUint32x4ShuffleMix:
+    case MethodRecognizer::kInt32x4ShuffleMix:
       // TODO(zra): Investigate better instruction sequences for shuffle masks.
       SRegister left_svalues[4];
       SRegister right_svalues[4];
 
       left_svalues[0] = EvenSRegisterOf(dleft0);
       left_svalues[1] = OddSRegisterOf(dleft0);
       left_svalues[2] = EvenSRegisterOf(dleft1);
       left_svalues[3] = OddSRegisterOf(dleft1);
       right_svalues[0] = EvenSRegisterOf(dright0);
       right_svalues[1] = OddSRegisterOf(dright0);
@@ skipping 348 matching lines @@
       __ vmovs(sresult2, STMP);
       break;
     case MethodRecognizer::kFloat32x4WithW:
       __ vmovs(sresult3, STMP);
       break;
     default: UNREACHABLE();
   }
 }
 
 
-LocationSummary* Float32x4ToUint32x4Instr::MakeLocationSummary() const {
+LocationSummary* Float32x4ToInt32x4Instr::MakeLocationSummary() const {
   const intptr_t kNumInputs = 1;
   const intptr_t kNumTemps = 0;
   LocationSummary* summary =
       new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
   summary->set_in(0, Location::RequiresFpuRegister());
   summary->set_out(Location::RequiresFpuRegister());
   return summary;
 }
 
 
-void Float32x4ToUint32x4Instr::EmitNativeCode(FlowGraphCompiler* compiler) {
+void Float32x4ToInt32x4Instr::EmitNativeCode(FlowGraphCompiler* compiler) {
   QRegister value = locs()->in(0).fpu_reg();
   QRegister result = locs()->out().fpu_reg();
 
   if (value != result) {
     __ vmovq(result, value);
   }
 }
 
 
-LocationSummary* Uint32x4BoolConstructorInstr::MakeLocationSummary() const {
+LocationSummary* Int32x4BoolConstructorInstr::MakeLocationSummary() const {
   const intptr_t kNumInputs = 4;
   const intptr_t kNumTemps = 1;
   LocationSummary* summary =
       new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
   summary->set_in(0, Location::RequiresRegister());
   summary->set_in(1, Location::RequiresRegister());
   summary->set_in(2, Location::RequiresRegister());
   summary->set_in(3, Location::RequiresRegister());
   summary->set_temp(0, Location::RequiresRegister());
   // Low (< 7) Q register needed for the vmovsr instruction.
   summary->set_out(Location::FpuRegisterLocation(Q6));
   return summary;
 }
 
 
-void Uint32x4BoolConstructorInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
+void Int32x4BoolConstructorInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
   Register v0 = locs()->in(0).reg();
   Register v1 = locs()->in(1).reg();
   Register v2 = locs()->in(2).reg();
   Register v3 = locs()->in(3).reg();
   Register temp = locs()->temp(0).reg();
   QRegister result = locs()->out().fpu_reg();
   DRegister dresult0 = EvenDRegisterOf(result);
   DRegister dresult1 = OddDRegisterOf(result);
   SRegister sresult0 = EvenSRegisterOf(dresult0);
   SRegister sresult1 = OddSRegisterOf(dresult0);
@@ skipping 10 matching lines @@
   __ vmovsr(sresult1, temp, EQ);
 
   __ CompareObject(v2, Bool::True());
   __ vmovsr(sresult2, temp, EQ);
 
   __ CompareObject(v3, Bool::True());
   __ vmovsr(sresult3, temp, EQ);
 }
 
 
-LocationSummary* Uint32x4GetFlagInstr::MakeLocationSummary() const {
+LocationSummary* Int32x4GetFlagInstr::MakeLocationSummary() const {
   const intptr_t kNumInputs = 1;
   const intptr_t kNumTemps = 0;
   LocationSummary* summary =
       new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
   // Low (< 7) Q registers are needed for the vmovrs instruction.
   summary->set_in(0, Location::FpuRegisterLocation(Q6));
   summary->set_out(Location::RequiresRegister());
   return summary;
 }
 
 
-void Uint32x4GetFlagInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
+void Int32x4GetFlagInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
   QRegister value = locs()->in(0).fpu_reg();
   Register result = locs()->out().reg();
 
   DRegister dvalue0 = EvenDRegisterOf(value);
   DRegister dvalue1 = OddDRegisterOf(value);
   SRegister svalue0 = EvenSRegisterOf(dvalue0);
   SRegister svalue1 = OddSRegisterOf(dvalue0);
   SRegister svalue2 = EvenSRegisterOf(dvalue1);
   SRegister svalue3 = OddSRegisterOf(dvalue1);
 
   switch (op_kind()) {
-    case MethodRecognizer::kUint32x4GetFlagX:
+    case MethodRecognizer::kInt32x4GetFlagX:
       __ vmovrs(result, svalue0);
       break;
-    case MethodRecognizer::kUint32x4GetFlagY:
+    case MethodRecognizer::kInt32x4GetFlagY:
       __ vmovrs(result, svalue1);
       break;
-    case MethodRecognizer::kUint32x4GetFlagZ:
+    case MethodRecognizer::kInt32x4GetFlagZ:
       __ vmovrs(result, svalue2);
       break;
-    case MethodRecognizer::kUint32x4GetFlagW:
+    case MethodRecognizer::kInt32x4GetFlagW:
       __ vmovrs(result, svalue3);
       break;
     default: UNREACHABLE();
   }
 
   __ tst(result, ShifterOperand(result));
   __ LoadObject(result, Bool::True(), NE);
   __ LoadObject(result, Bool::False(), EQ);
 }
 
 
-LocationSummary* Uint32x4SelectInstr::MakeLocationSummary() const {
+LocationSummary* Int32x4SelectInstr::MakeLocationSummary() const {
   const intptr_t kNumInputs = 3;
   const intptr_t kNumTemps = 1;
   LocationSummary* summary =
       new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
   summary->set_in(0, Location::RequiresFpuRegister());
   summary->set_in(1, Location::RequiresFpuRegister());
   summary->set_in(2, Location::RequiresFpuRegister());
   summary->set_temp(0, Location::RequiresFpuRegister());
   summary->set_out(Location::RequiresFpuRegister());
   return summary;
 }
 
 
-void Uint32x4SelectInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
+void Int32x4SelectInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
   QRegister mask = locs()->in(0).fpu_reg();
   QRegister trueValue = locs()->in(1).fpu_reg();
   QRegister falseValue = locs()->in(2).fpu_reg();
   QRegister out = locs()->out().fpu_reg();
   QRegister temp = locs()->temp(0).fpu_reg();
 
   // Copy mask.
   __ vmovq(temp, mask);
   // Invert it.
   __ veorq(QTMP, QTMP, QTMP);  // QTMP <- 0.
   __ vornq(temp, QTMP, temp);  //  temp <- ~temp.
   // mask = mask & trueValue.
   __ vandq(mask, mask, trueValue);
   // temp = temp & falseValue.
   __ vandq(temp, temp, falseValue);
   // out = mask | temp.
   __ vorrq(out, mask, temp);
 }
 
 
-LocationSummary* Uint32x4SetFlagInstr::MakeLocationSummary() const {
+LocationSummary* Int32x4SetFlagInstr::MakeLocationSummary() const {
   const intptr_t kNumInputs = 2;
   const intptr_t kNumTemps = 0;
   LocationSummary* summary =
       new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
   summary->set_in(0, Location::RequiresFpuRegister());
   summary->set_in(1, Location::RequiresRegister());
   // Low (< 7) Q register needed for the vmovsr instruction.
   summary->set_out(Location::FpuRegisterLocation(Q6));
   return summary;
 }
 
 
-void Uint32x4SetFlagInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
+void Int32x4SetFlagInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
   QRegister mask = locs()->in(0).fpu_reg();
   Register flag = locs()->in(1).reg();
   QRegister result = locs()->out().fpu_reg();
 
   DRegister dresult0 = EvenDRegisterOf(result);
   DRegister dresult1 = OddDRegisterOf(result);
   SRegister sresult0 = EvenSRegisterOf(dresult0);
   SRegister sresult1 = OddSRegisterOf(dresult0);
   SRegister sresult2 = EvenSRegisterOf(dresult1);
   SRegister sresult3 = OddSRegisterOf(dresult1);
 
   if (result != mask) {
     __ vmovq(result, mask);
   }
 
   __ CompareObject(flag, Bool::True());
   __ LoadImmediate(TMP, 0xffffffff, EQ);
   __ LoadImmediate(TMP, 0, NE);
   switch (op_kind()) {
-    case MethodRecognizer::kUint32x4WithFlagX:
+    case MethodRecognizer::kInt32x4WithFlagX:
       __ vmovsr(sresult0, TMP);
       break;
-    case MethodRecognizer::kUint32x4WithFlagY:
+    case MethodRecognizer::kInt32x4WithFlagY:
       __ vmovsr(sresult1, TMP);
       break;
-    case MethodRecognizer::kUint32x4WithFlagZ:
+    case MethodRecognizer::kInt32x4WithFlagZ:
       __ vmovsr(sresult2, TMP);
       break;
-    case MethodRecognizer::kUint32x4WithFlagW:
+    case MethodRecognizer::kInt32x4WithFlagW:
       __ vmovsr(sresult3, TMP);
       break;
     default: UNREACHABLE();
   }
 }
 
 
-LocationSummary* Uint32x4ToFloat32x4Instr::MakeLocationSummary() const {
+LocationSummary* Int32x4ToFloat32x4Instr::MakeLocationSummary() const {
   const intptr_t kNumInputs = 1;
   const intptr_t kNumTemps = 0;
   LocationSummary* summary =
       new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
   summary->set_in(0, Location::RequiresFpuRegister());
   summary->set_out(Location::RequiresFpuRegister());
   return summary;
 }
 
 
-void Uint32x4ToFloat32x4Instr::EmitNativeCode(FlowGraphCompiler* compiler) {
+void Int32x4ToFloat32x4Instr::EmitNativeCode(FlowGraphCompiler* compiler) {
   QRegister value = locs()->in(0).fpu_reg();
   QRegister result = locs()->out().fpu_reg();
 
   if (value != result) {
     __ vmovq(result, value);
   }
 }
 
 
-LocationSummary* BinaryUint32x4OpInstr::MakeLocationSummary() const {
+LocationSummary* BinaryInt32x4OpInstr::MakeLocationSummary() const {
   const intptr_t kNumInputs = 2;
   const intptr_t kNumTemps = 0;
   LocationSummary* summary =
       new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
   summary->set_in(0, Location::RequiresFpuRegister());
   summary->set_in(1, Location::RequiresFpuRegister());
   summary->set_out(Location::RequiresFpuRegister());
   return summary;
 }
 
 
-void BinaryUint32x4OpInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
+void BinaryInt32x4OpInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
   QRegister left = locs()->in(0).fpu_reg();
   QRegister right = locs()->in(1).fpu_reg();
   QRegister result = locs()->out().fpu_reg();
   switch (op_kind()) {
     case Token::kBIT_AND: {
       __ vandq(result, left, right);
       break;
     }
     case Token::kBIT_OR: {
       __ vorrq(result, left, right);
@@ skipping 938 matching lines @@
   compiler->GenerateCall(token_pos(),
                          &label,
                          PcDescriptors::kOther,
                          locs());
   __ Drop(2);  // Discard type arguments and receiver.
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM