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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/compiler/code-generator.h" | 5 #include "src/compiler/code-generator.h" |
6 | 6 |
7 #include "src/arm/macro-assembler-arm.h" | 7 #include "src/arm/macro-assembler-arm.h" |
8 #include "src/compiler/code-generator-impl.h" | 8 #include "src/compiler/code-generator-impl.h" |
9 #include "src/compiler/gap-resolver.h" | 9 #include "src/compiler/gap-resolver.h" |
10 #include "src/compiler/node-matchers.h" | 10 #include "src/compiler/node-matchers.h" |
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129 return MemOperand(offset.from_stack_pointer() ? sp : fp, offset.offset()); | 129 return MemOperand(offset.from_stack_pointer() ? sp : fp, offset.offset()); |
130 } | 130 } |
131 }; | 131 }; |
132 | 132 |
133 | 133 |
134 // Assembles an instruction after register allocation, producing machine code. | 134 // Assembles an instruction after register allocation, producing machine code. |
135 void CodeGenerator::AssembleArchInstruction(Instruction* instr) { | 135 void CodeGenerator::AssembleArchInstruction(Instruction* instr) { |
136 ArmOperandConverter i(this, instr); | 136 ArmOperandConverter i(this, instr); |
137 | 137 |
138 switch (ArchOpcodeField::decode(instr->opcode())) { | 138 switch (ArchOpcodeField::decode(instr->opcode())) { |
139 case kArchCallAddress: { | |
140 DirectCEntryStub stub(isolate()); | |
141 stub.GenerateCall(masm(), i.InputRegister(0)); | |
142 DCHECK_EQ(LeaveCC, i.OutputSBit()); | |
143 break; | |
144 } | |
145 case kArchCallCodeObject: { | 139 case kArchCallCodeObject: { |
146 if (instr->InputAt(0)->IsImmediate()) { | 140 if (instr->InputAt(0)->IsImmediate()) { |
147 __ Call(Handle<Code>::cast(i.InputHeapObject(0)), | 141 __ Call(Handle<Code>::cast(i.InputHeapObject(0)), |
148 RelocInfo::CODE_TARGET); | 142 RelocInfo::CODE_TARGET); |
149 } else { | 143 } else { |
150 __ add(ip, i.InputRegister(0), | 144 __ add(ip, i.InputRegister(0), |
151 Operand(Code::kHeaderSize - kHeapObjectTag)); | 145 Operand(Code::kHeaderSize - kHeapObjectTag)); |
152 __ Call(ip); | 146 __ Call(ip); |
153 } | 147 } |
154 AddSafepointAndDeopt(instr); | 148 AddSafepointAndDeopt(instr); |
155 DCHECK_EQ(LeaveCC, i.OutputSBit()); | 149 DCHECK_EQ(LeaveCC, i.OutputSBit()); |
156 break; | 150 break; |
157 } | 151 } |
158 case kArchCallJSFunction: { | 152 case kArchCallJSFunction: { |
159 Register func = i.InputRegister(0); | 153 Register func = i.InputRegister(0); |
160 if (FLAG_debug_code) { | 154 if (FLAG_debug_code) { |
161 // Check the function's context matches the context argument. | 155 // Check the function's context matches the context argument. |
162 __ ldr(kScratchReg, FieldMemOperand(func, JSFunction::kContextOffset)); | 156 __ ldr(kScratchReg, FieldMemOperand(func, JSFunction::kContextOffset)); |
163 __ cmp(cp, kScratchReg); | 157 __ cmp(cp, kScratchReg); |
164 __ Assert(eq, kWrongFunctionContext); | 158 __ Assert(eq, kWrongFunctionContext); |
165 } | 159 } |
166 __ ldr(ip, FieldMemOperand(func, JSFunction::kCodeEntryOffset)); | 160 __ ldr(ip, FieldMemOperand(func, JSFunction::kCodeEntryOffset)); |
167 __ Call(ip); | 161 __ Call(ip); |
168 AddSafepointAndDeopt(instr); | 162 AddSafepointAndDeopt(instr); |
169 DCHECK_EQ(LeaveCC, i.OutputSBit()); | 163 DCHECK_EQ(LeaveCC, i.OutputSBit()); |
170 break; | 164 break; |
171 } | 165 } |
172 case kArchDrop: { | |
173 int words = MiscField::decode(instr->opcode()); | |
174 __ Drop(words); | |
175 DCHECK_LT(0, words); | |
176 DCHECK_EQ(LeaveCC, i.OutputSBit()); | |
177 break; | |
178 } | |
179 case kArchJmp: | 166 case kArchJmp: |
180 __ b(code_->GetLabel(i.InputBlock(0))); | 167 __ b(code_->GetLabel(i.InputBlock(0))); |
181 DCHECK_EQ(LeaveCC, i.OutputSBit()); | 168 DCHECK_EQ(LeaveCC, i.OutputSBit()); |
182 break; | 169 break; |
183 case kArchNop: | 170 case kArchNop: |
184 // don't emit code for nops. | 171 // don't emit code for nops. |
185 DCHECK_EQ(LeaveCC, i.OutputSBit()); | 172 DCHECK_EQ(LeaveCC, i.OutputSBit()); |
186 break; | 173 break; |
187 case kArchRet: | 174 case kArchRet: |
188 AssembleReturn(); | 175 AssembleReturn(); |
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854 | 841 |
855 void CodeGenerator::AddNopForSmiCodeInlining() { | 842 void CodeGenerator::AddNopForSmiCodeInlining() { |
856 // On 32-bit ARM we do not insert nops for inlined Smi code. | 843 // On 32-bit ARM we do not insert nops for inlined Smi code. |
857 } | 844 } |
858 | 845 |
859 #undef __ | 846 #undef __ |
860 | 847 |
861 } // namespace compiler | 848 } // namespace compiler |
862 } // namespace internal | 849 } // namespace internal |
863 } // namespace v8 | 850 } // namespace v8 |
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