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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/v8.h" | 5 #include "src/v8.h" |
6 | 6 |
7 #if V8_TARGET_ARCH_X64 | 7 #if V8_TARGET_ARCH_X64 |
8 | 8 |
9 #include "src/base/bits.h" | 9 #include "src/base/bits.h" |
10 #include "src/macro-assembler.h" | 10 #include "src/macro-assembler.h" |
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2622 void Assembler::cvttsd2siq(Register dst, XMMRegister src) { | 2622 void Assembler::cvttsd2siq(Register dst, XMMRegister src) { |
2623 EnsureSpace ensure_space(this); | 2623 EnsureSpace ensure_space(this); |
2624 emit(0xF2); | 2624 emit(0xF2); |
2625 emit_rex_64(dst, src); | 2625 emit_rex_64(dst, src); |
2626 emit(0x0F); | 2626 emit(0x0F); |
2627 emit(0x2C); | 2627 emit(0x2C); |
2628 emit_sse_operand(dst, src); | 2628 emit_sse_operand(dst, src); |
2629 } | 2629 } |
2630 | 2630 |
2631 | 2631 |
| 2632 void Assembler::cvttsd2siq(Register dst, const Operand& src) { |
| 2633 EnsureSpace ensure_space(this); |
| 2634 emit(0xF2); |
| 2635 emit_rex_64(dst, src); |
| 2636 emit(0x0F); |
| 2637 emit(0x2C); |
| 2638 emit_sse_operand(dst, src); |
| 2639 } |
| 2640 |
| 2641 |
2632 void Assembler::cvtlsi2sd(XMMRegister dst, const Operand& src) { | 2642 void Assembler::cvtlsi2sd(XMMRegister dst, const Operand& src) { |
2633 EnsureSpace ensure_space(this); | 2643 EnsureSpace ensure_space(this); |
2634 emit(0xF2); | 2644 emit(0xF2); |
2635 emit_optional_rex_32(dst, src); | 2645 emit_optional_rex_32(dst, src); |
2636 emit(0x0F); | 2646 emit(0x0F); |
2637 emit(0x2A); | 2647 emit(0x2A); |
2638 emit_sse_operand(dst, src); | 2648 emit_sse_operand(dst, src); |
2639 } | 2649 } |
2640 | 2650 |
2641 | 2651 |
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2893 emit_sse_operand(dst, src); | 2903 emit_sse_operand(dst, src); |
2894 } | 2904 } |
2895 | 2905 |
2896 | 2906 |
2897 void Assembler::emit_sse_operand(XMMRegister reg, const Operand& adr) { | 2907 void Assembler::emit_sse_operand(XMMRegister reg, const Operand& adr) { |
2898 Register ireg = { reg.code() }; | 2908 Register ireg = { reg.code() }; |
2899 emit_operand(ireg, adr); | 2909 emit_operand(ireg, adr); |
2900 } | 2910 } |
2901 | 2911 |
2902 | 2912 |
| 2913 void Assembler::emit_sse_operand(Register reg, const Operand& adr) { |
| 2914 Register ireg = {reg.code()}; |
| 2915 emit_operand(ireg, adr); |
| 2916 } |
| 2917 |
| 2918 |
2903 void Assembler::emit_sse_operand(XMMRegister dst, XMMRegister src) { | 2919 void Assembler::emit_sse_operand(XMMRegister dst, XMMRegister src) { |
2904 emit(0xC0 | (dst.low_bits() << 3) | src.low_bits()); | 2920 emit(0xC0 | (dst.low_bits() << 3) | src.low_bits()); |
2905 } | 2921 } |
2906 | 2922 |
2907 | 2923 |
2908 void Assembler::emit_sse_operand(XMMRegister dst, Register src) { | 2924 void Assembler::emit_sse_operand(XMMRegister dst, Register src) { |
2909 emit(0xC0 | (dst.low_bits() << 3) | src.low_bits()); | 2925 emit(0xC0 | (dst.low_bits() << 3) | src.low_bits()); |
2910 } | 2926 } |
2911 | 2927 |
2912 | 2928 |
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2995 | 3011 |
2996 | 3012 |
2997 bool RelocInfo::IsInConstantPool() { | 3013 bool RelocInfo::IsInConstantPool() { |
2998 return false; | 3014 return false; |
2999 } | 3015 } |
3000 | 3016 |
3001 | 3017 |
3002 } } // namespace v8::internal | 3018 } } // namespace v8::internal |
3003 | 3019 |
3004 #endif // V8_TARGET_ARCH_X64 | 3020 #endif // V8_TARGET_ARCH_X64 |
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