[turbofan] IA: Float64ToUint32 supports mem operand

src/compiler/x64/code-generator-x64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/code-generator.h"
 
 #include "src/compiler/code-generator-impl.h"
 #include "src/compiler/gap-resolver.h"
 #include "src/compiler/node-matchers.h"
 #include "src/compiler/node-properties-inl.h"
@@ skipping 451 matching lines @@
     case kSSEFloat64ToInt32: {
       RegisterOrOperand input = i.InputRegisterOrOperand(0);
       if (input.type == kDoubleRegister) {
         __ cvttsd2si(i.OutputRegister(), input.double_reg);
       } else {
         __ cvttsd2si(i.OutputRegister(), input.operand);
       }
       break;
     }
     case kSSEFloat64ToUint32: {
-      // TODO(turbofan): X64 SSE cvttsd2siq should support operands.
-      __ cvttsd2siq(i.OutputRegister(), i.InputDoubleRegister(0));
+      RegisterOrOperand input = i.InputRegisterOrOperand(0);
+      if (input.type == kDoubleRegister) {
+        __ cvttsd2siq(i.OutputRegister(), input.double_reg);
+      } else {
+        __ cvttsd2siq(i.OutputRegister(), input.operand);
+      }
       __ andl(i.OutputRegister(), i.OutputRegister());  // clear upper bits.
-      // TODO(turbofan): generated code should not look at the upper 32 bits
-      // of the result, but those bits could escape to the outside world.
       break;
     }
     case kSSEInt32ToFloat64: {
       RegisterOrOperand input = i.InputRegisterOrOperand(0);
       if (input.type == kRegister) {
         __ cvtlsi2sd(i.OutputDoubleRegister(), input.reg);
       } else {
         __ cvtlsi2sd(i.OutputDoubleRegister(), input.operand);
       }
       break;
@@ skipping 512 matching lines @@
 }
 
 
 void CodeGenerator::AddNopForSmiCodeInlining() { __ nop(); }
 
 #undef __
 
 }  // namespace internal
 }  // namespace compiler
 }  // namespace v8