Lift register and condition code enums out into their own file.

src/IceRegistersX8632.h

Index: src/IceRegistersX8632.h
diff --git a/src/IceRegistersX8632.h b/src/IceRegistersX8632.h
new file mode 100644
index 0000000000000000000000000000000000000000..35c75afb7b1be42be82765b8d1c73e1478e5c03b
--- /dev/null
+++ b/src/IceRegistersX8632.h
@@ -0,0 +1,83 @@
+//===- subzero/src/IceRegistersX8632.h - Register information ---*- C++ -*-===//
+//
+//                        The Subzero Code Generator
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file declares the registers and their encodings for x86-32.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef SUBZERO_SRC_ICEREGISTERSX8632_H
+#define SUBZERO_SRC_ICEREGISTERSX8632_H
+
+#include "IceDefs.h"
+#include "IceInstX8632.def"
+
+namespace Ice {
+
+class RegX8632 {
+public:
+  // An enum of every register. The enum value may not match the encoding
+  // used to binary encode register operands in instructions.
+  enum AllRegisters {
+#define X(val, encode, name, name16, name8, scratch, preserved, stackptr,      \
+          frameptr, isI8, isInt, isFP)                                         \
+  val,

[Jim Stichnoth, 2014/09/18 21:16:35]

Just so I understand this correctly, the RegX8632::Reg_foo values are all
unique, and these are the values assigned to Variable::RegNum?  And they are the
values that are used internally until time for code emission?

[jvoung (off chromium), 2014/09/19 00:52:47]

Yes, that's right. I'm currently just letting the enum automatically count up.

Then the Variable::RegNum get to RegX8632::Encoded_Reg_foo, etc. for emission.
It seemed risky to have them be non-unique before emission.

+    REGX8632_TABLE
+#undef X
+        Reg_NUM
+  };
+
+  // An enum of GPR Registers. The enum value does match encoding used
+  // to binary encode register operands in instructions.
+  enum GPRRegister {
+#define X(val, encode, name, name16, name8, scratch, preserved, stackptr,      \
+          frameptr, isI8, isInt, isFP)                                         \
+  Encoded_##val encode,
+    REGX8632_GPR_TABLE
+#undef X
+  };
+
+  // An enum of XMM Registers. The enum value does match encoding used
+  // to binary encode register operands in instructions.
+  enum XmmRegister {
+#define X(val, encode, name, name16, name8, scratch, preserved, stackptr,      \
+          frameptr, isI8, isInt, isFP)                                         \
+  Encoded_##val encode,
+    REGX8632_XMM_TABLE
+#undef X
+  };
+
+  // An enum of Byte Registers. The enum value does match encoding used
+  // to binary encode register operands in instructions.
+  enum ByteRegister {
+#define X(val, encode) Encoded_##val encode,
+    REGX8632_BYTEREG_TABLE
+#undef X
+  };
+
+  static GPRRegister getEncodedGPR(int32_t RegNum) {
+    assert(Reg_eax <= RegNum && RegNum <= Reg_edi);

[Jim Stichnoth, 2014/09/18 21:16:35]

Would it be practical to use something like Reg_GPR_First and Reg_GPR_Last
instead of Reg_eax and Reg_edi?  (Same comment for the XMM registers.)  You
should probably also subtract Reg_eax / Reg_GPR_First in the same way that
Reg_xmm0 is subtracted in line 70.

[jvoung (off chromium), 2014/09/19 00:52:47]

Done (subtraction, and adding First/Last).

It only seemed "right" to define Reg_GPR_First/Last alongside Reg_eax in the
.defs file, so that they stay in sync. However, I can't do it "inline" with
REGX8632_TABLE (or the sub parts like REGX8632_GPR_TABLE). Otherwise it will end
up adding extra slots for things like:

IceString RegNames[] = {
#define X(name, ...) \
  name
  REGX8632_TABLE
#undef X

and throw off the indexing into the RegNames[] array.

Instead, I put another macro alongside REGX8632_TABLE, called
REGX8632_TABLE_BOUNDS, and AllRegisters would use that as well.

+    return GPRRegister(RegNum);
+  }
+
+  static XmmRegister getEncodedXmm(int32_t RegNum) {
+    assert(Reg_xmm0 <= RegNum && RegNum <= Reg_xmm7);
+    return XmmRegister(RegNum - Reg_xmm0);
+  }
+
+  static ByteRegister getEncodedByteReg(int32_t RegNum) {
+    assert(RegNum == Reg_ah || (Reg_eax <= RegNum && RegNum <= Reg_ebx));
+    if (RegNum == Reg_ah)
+      return Encoded_Reg_ah;
+    return ByteRegister(RegNum);
+  }
+};
+
+} // end of namespace Ice
+
+#endif // SUBZERO_SRC_ICEREGISTERSX8632_H