Lift register and condition code enums out into their own file.

src/IceTargetLoweringX8632.h

 //===- subzero/src/IceTargetLoweringX8632.h - x86-32 lowering ---*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file declares the TargetLoweringX8632 class, which
 // implements the TargetLowering interface for the x86-32
 // architecture.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef SUBZERO_SRC_ICETARGETLOWERINGX8632_H
 #define SUBZERO_SRC_ICETARGETLOWERINGX8632_H
 
 #include "IceDefs.h"
 #include "IceTargetLowering.h"
 #include "IceInstX8632.h"
+#include "IceRegistersX8632.h"
 
 namespace Ice {
 
 class TargetX8632 : public TargetLowering {
 public:
   static TargetX8632 *create(Cfg *Func) { return new TargetX8632(Func); }
 
   virtual void translateOm1();
   virtual void translateO2();
   virtual bool doBranchOpt(Inst *I, const CfgNode *NextNode);
 
   virtual Variable *getPhysicalRegister(SizeT RegNum);
   virtual IceString getRegName(SizeT RegNum, Type Ty) const;
   virtual llvm::SmallBitVector getRegisterSet(RegSetMask Include,
                                               RegSetMask Exclude) const;
   virtual const llvm::SmallBitVector &getRegisterSetForType(Type Ty) const {
     return TypeToRegisterSet[Ty];
   }
   virtual bool hasFramePointer() const { return IsEbpBasedFrame; }
   virtual SizeT getFrameOrStackReg() const {
-    return IsEbpBasedFrame ? Reg_ebp : Reg_esp;
+    return IsEbpBasedFrame ? RegX8632::Reg_ebp : RegX8632::Reg_esp;
   }
   virtual size_t typeWidthInBytesOnStack(Type Ty) const {
     // Round up to the next multiple of 4 bytes.  In particular, i1,
     // i8, and i16 are rounded up to 4 bytes.
     return (typeWidthInBytes(Ty) + 3) & ~3;
   }
   virtual SizeT getBundleAlignLog2Bytes() const { return 5; }
   virtual llvm::ArrayRef<uint8_t> getNonExecBundlePadding() const {
     static const uint8_t Padding[] = { 0xF4 };
     return llvm::ArrayRef<uint8_t>(Padding, 1);
   }
   virtual void emitVariable(const Variable *Var, const Cfg *Func) const;
   virtual void lowerArguments();
   virtual void addProlog(CfgNode *Node);
   virtual void addEpilog(CfgNode *Node);
   virtual void emitConstants() const;
   SizeT makeNextLabelNumber() { return NextLabelNumber++; }
   // Ensure that a 64-bit Variable has been split into 2 32-bit
   // Variables, creating them if necessary.  This is needed for all
   // I64 operations, and it is needed for pushing F64 arguments for
   // function calls using the 32-bit push instruction (though the
   // latter could be done by directly writing to the stack).
   void split64(Variable *Var);
   void finishArgumentLowering(Variable *Arg, Variable *FramePtr,
                               size_t BasicFrameOffset, size_t &InArgsSizeBytes);
   Operand *loOperand(Operand *Operand);
   Operand *hiOperand(Operand *Operand);
 
-  enum Registers {
-#define X(val, init, name, name16, name8, scratch, preserved, stackptr,        \
-          frameptr, isI8, isInt, isFP)                                         \
-  val init,
-    REGX8632_TABLE
-#undef X
-        Reg_NUM
-  };
-
   enum X86InstructionSet {
     // SSE2 is the PNaCl baseline instruction set.
     SSE2,
     SSE4_1
   };
 
   X86InstructionSet getInstructionSet() const { return InstructionSet; }
 
 protected:
   TargetX8632(Cfg *Func);
@@ skipping 115 matching lines @@
   }
   void _addss(Variable *Dest, Operand *Src0) {
     Context.insert(InstX8632Addss::create(Func, Dest, Src0));
   }
   void _and(Variable *Dest, Operand *Src0) {
     Context.insert(InstX8632And::create(Func, Dest, Src0));
   }
   void _blendvps(Variable *Dest, Operand *Src0, Operand *Src1) {
     Context.insert(InstX8632Blendvps::create(Func, Dest, Src0, Src1));
   }
-  void _br(InstX8632::BrCond Condition, CfgNode *TargetTrue,
+  void _br(CondX86::BrCond Condition, CfgNode *TargetTrue,
            CfgNode *TargetFalse) {
     Context.insert(
         InstX8632Br::create(Func, TargetTrue, TargetFalse, Condition));
   }
   void _br(CfgNode *Target) {
     Context.insert(InstX8632Br::create(Func, Target));
   }
-  void _br(InstX8632::BrCond Condition, CfgNode *Target) {
+  void _br(CondX86::BrCond Condition, CfgNode *Target) {
     Context.insert(InstX8632Br::create(Func, Target, Condition));
   }
-  void _br(InstX8632::BrCond Condition, InstX8632Label *Label) {
+  void _br(CondX86::BrCond Condition, InstX8632Label *Label) {
     Context.insert(InstX8632Br::create(Func, Label, Condition));
   }
   void _bsf(Variable *Dest, Operand *Src0) {
     Context.insert(InstX8632Bsf::create(Func, Dest, Src0));
   }
   void _bsr(Variable *Dest, Operand *Src0) {
     Context.insert(InstX8632Bsr::create(Func, Dest, Src0));
   }
   void _bswap(Variable *SrcDest) {
     Context.insert(InstX8632Bswap::create(Func, SrcDest));
   }
   void _cbwdq(Variable *Dest, Operand *Src0) {
     Context.insert(InstX8632Cbwdq::create(Func, Dest, Src0));
   }
-  void _cmov(Variable *Dest, Operand *Src0, InstX8632::BrCond Condition) {
+  void _cmov(Variable *Dest, Operand *Src0, CondX86::BrCond Condition) {
     Context.insert(InstX8632Cmov::create(Func, Dest, Src0, Condition));
   }
   void _cmp(Operand *Src0, Operand *Src1) {
     Context.insert(InstX8632Icmp::create(Func, Src0, Src1));
   }
-  void _cmpps(Variable *Dest, Operand *Src0,
-              InstX8632Cmpps::CmppsCond Condition) {
+  void _cmpps(Variable *Dest, Operand *Src0, CondX86::CmppsCond Condition) {
     Context.insert(InstX8632Cmpps::create(Func, Dest, Src0, Condition));
   }
   void _cmpxchg(Operand *DestOrAddr, Variable *Eax, Variable *Desired,
                 bool Locked) {
     Context.insert(
         InstX8632Cmpxchg::create(Func, DestOrAddr, Eax, Desired, Locked));
     // Mark eax as possibly modified by cmpxchg.
     Context.insert(
         InstFakeDef::create(Func, Eax, llvm::dyn_cast<Variable>(DestOrAddr)));
   }
@@ skipping 252 matching lines @@
 };
 
 template <> void ConstantInteger32::emit(GlobalContext *Ctx) const;
 template <> void ConstantInteger64::emit(GlobalContext *Ctx) const;
 template <> void ConstantFloat::emit(GlobalContext *Ctx) const;
 template <> void ConstantDouble::emit(GlobalContext *Ctx) const;
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8632_H