VM: Use current isolate as immediate in per-isolate stubs.

runtime/vm/stub_code_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/assembler.h"
 #include "vm/code_generator.h"
 #include "vm/compiler.h"
@@ skipping 856 matching lines @@
 
   // The new Context structure contains a pointer to the current Isolate
   // structure. Cache the Context pointer in the CTX register so that it is
   // available in generated code and calls to Isolate::Current() need not be
   // done. The assumption is that this register will never be clobbered by
   // compiled or runtime stub code.
 
   // Cache the new Context pointer into CTX while executing Dart code.
   __ lw(CTX, Address(A3, VMHandles::kOffsetOfRawPtrInHandle));
 
-  // Load Isolate pointer from Context structure into temporary register R8.
-  __ lw(T2, FieldAddress(CTX, Context::isolate_offset()));
+  __ LoadImmediate(T2, Isolate::CurrentAddress());
 
   // Save the current VMTag on the stack.
   ASSERT(kSavedVMTagSlotFromEntryFp == -22);
   __ lw(T1, Address(T2, Isolate::vm_tag_offset()));
   __ sw(T1, Address(SP, 2 * kWordSize));
 
   // Mark that the isolate is executing Dart code.
   __ LoadImmediate(T0, VMTag::kDartTagId);
   __ sw(T0, Address(T2, Isolate::vm_tag_offset()));
 
@@ skipping 51 matching lines @@
   __ jalr(A0);  // S4 is the arguments descriptor array.
   __ TraceSimMsg("InvokeDartCodeStub return");
 
   // Read the saved new Context pointer.
   __ lw(CTX, Address(FP, kNewContextOffsetFromFp));
   __ lw(CTX, Address(CTX, VMHandles::kOffsetOfRawPtrInHandle));
 
   // Get rid of arguments pushed on the stack.
   __ AddImmediate(SP, FP, kSavedContextSlotFromEntryFp * kWordSize);
 
-  // Load Isolate pointer from Context structure into CTX. Drop Context.
-  __ lw(CTX, FieldAddress(CTX, Context::isolate_offset()));
+  // Load Isolate pointer into CTX. Drop Context.
+  __ LoadImmediate(CTX, Isolate::CurrentAddress());
 
   // Restore the current VMTag from the stack.
   __ lw(T1, Address(SP, 2 * kWordSize));
   __ sw(T1, Address(CTX, Isolate::vm_tag_offset()));
 
   // Restore the saved Context pointer into the Isolate structure.
   // Uses T1 as a temporary register for this.
   // Restore the saved top exit frame info back into the Isolate structure.
   // Uses T0 as a temporary register for this.
   __ lw(T1, Address(SP, 0 * kWordSize));
@@ skipping 92 matching lines @@
     __ LoadImmediate(TMP, RawObject::ClassIdTag::encode(context_class.id()));
     __ or_(T2, T2, TMP);
     __ sw(T2, FieldAddress(V0, Context::tags_offset()));
 
     // Setup up number of context variables field.
     // V0: new object.
     // T1: number of context variables as integer value (not object).
     __ sw(T1, FieldAddress(V0, Context::num_variables_offset()));
 
     // Setup isolate field.
-    // Load Isolate pointer from Context structure into R2.
     // V0: new object.
     // T1: number of context variables.
-    __ lw(T2, FieldAddress(CTX, Context::isolate_offset()));
     // T2: isolate, not an object.
+    __ LoadImmediate(T2, Isolate::CurrentAddress());
     __ sw(T2, FieldAddress(V0, Context::isolate_offset()));
 
     __ LoadImmediate(T7, reinterpret_cast<intptr_t>(Object::null()));
 
     // Initialize the context variables.
     // V0: new object.
     // T1: number of context variables.
     Label loop, loop_exit;
     __ blez(T1, &loop_exit);
     // Setup the parent field.
@@ skipping 57 matching lines @@
   __ lw(T1, Address(SP, 0 * kWordSize));
   __ lw(T2, Address(SP, 1 * kWordSize));
   __ lw(T3, Address(SP, 2 * kWordSize));
   __ addiu(SP, SP, Immediate(3 * kWordSize));
   __ Ret();
 
   __ Bind(&add_to_buffer);
   __ ori(T2, T2, Immediate(1 << RawObject::kRememberedBit));
   __ sw(T2, FieldAddress(T0, Object::tags_offset()));
 
-  // Load the isolate out of the context.
+  // Load the isolate.
   // Spilled: T1, T2, T3.
   // T0: Address being stored.
-  __ lw(T1, FieldAddress(CTX, Context::isolate_offset()));
+  __ LoadImmediate(T1, Isolate::CurrentAddress());
 
   // Load the StoreBuffer block out of the isolate. Then load top_ out of the
   // StoreBufferBlock and add the address to the pointers_.
   // T1: Isolate.
   __ lw(T1, Address(T1, Isolate::store_buffer_offset()));
   __ lw(T2, Address(T1, StoreBufferBlock::top_offset()));
   __ sll(T3, T2, 2);
   __ addu(T3, T1, T3);
   __ sw(T0, Address(T3, StoreBufferBlock::pointers_offset()));
 
@@ skipping 10 matching lines @@
   __ lw(T3, Address(SP, 2 * kWordSize));
   __ beq(CMPRES1, ZR, &L);
   __ delay_slot()->addiu(SP, SP, Immediate(3 * kWordSize));
   __ Ret();
 
   // Handle overflow: Call the runtime leaf function.
   __ Bind(&L);
   // Setup frame, push callee-saved registers.
 
   __ EnterCallRuntimeFrame(1 * kWordSize);
-  __ lw(A0, FieldAddress(CTX, Context::isolate_offset()));
+  __ LoadImmediate(A0, Isolate::CurrentAddress());
   __ CallRuntime(kStoreBufferBlockProcessRuntimeEntry, 1);
   __ TraceSimMsg("UpdateStoreBufferStub return");
   // Restore callee-saved registers, tear down frame.
   __ LeaveCallRuntimeFrame();
   __ Ret();
 }
 
 
 // Called for inline allocation of objects.
 // Input parameters:
@@ skipping 299 matching lines @@
     __ lw(T0, FieldAddress(S5, ICData::state_bits_offset()));
     ASSERT(ICData::NumArgsTestedShift() == 0);  // No shift needed.
     __ andi(T0, T0, Immediate(ICData::NumArgsTestedMask()));
     __ BranchEqual(T0, num_args, &ok);
     __ Stop("Incorrect stub for IC data");
     __ Bind(&ok);
   }
 #endif  // DEBUG
 
 
+  // Check single stepping.
   Label stepping, done_stepping;
-  // Check single stepping.
-  __ lw(T0, FieldAddress(CTX, Context::isolate_offset()));
+  __ LoadImmediate(T0, Isolate::CurrentAddress());
   __ lbu(T0, Address(T0, Isolate::single_step_offset()));
   __ BranchNotEqual(T0, 0, &stepping);
   __ Bind(&done_stepping);
 
   if (kind != Token::kILLEGAL) {
     Label not_smi_or_overflow;
     EmitFastSmiOp(assembler, kind, num_args, &not_smi_or_overflow);
     __ Bind(&not_smi_or_overflow);
   }
 
@@ skipping 235 matching lines @@
     ASSERT(ICData::NumArgsTestedShift() == 0);  // No shift needed.
     __ andi(T0, T0, Immediate(ICData::NumArgsTestedMask()));
     __ beq(T0, ZR, &ok);
     __ Stop("Incorrect IC data for unoptimized static call");
     __ Bind(&ok);
   }
 #endif  // DEBUG
 
   // Check single stepping.
   Label stepping, done_stepping;
-  __ lw(T0, FieldAddress(CTX, Context::isolate_offset()));
+  __ LoadImmediate(T0, Isolate::CurrentAddress());
   __ lbu(T0, Address(T0, Isolate::single_step_offset()));
   __ BranchNotEqual(T0, 0, &stepping);
   __ Bind(&done_stepping);
 
   // S5: IC data object (preserved).
   __ lw(T0, FieldAddress(S5, ICData::ic_data_offset()));
   // T0: ic_data_array with entries: target functions and count.
   __ AddImmediate(T0, Array::data_offset() - kHeapObjectTag);
   // T0: points directly to the first ic data array element.
   const intptr_t target_offset = ICData::TargetIndexFor(0) * kWordSize;
@@ skipping 460 matching lines @@
   const Register right = T0;
   __ lw(left, Address(SP, 1 * kWordSize));
   __ lw(right, Address(SP, 0 * kWordSize));
   GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2);
   __ Ret();
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS