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Side by Side Diff: src/IceTargetLoweringX8632.h

Issue 580903005: Subzero: Add branch optimization. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Code review changes Created 6 years, 3 months ago
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1 //===- subzero/src/IceTargetLoweringX8632.h - x86-32 lowering ---*- C++ -*-===// 1 //===- subzero/src/IceTargetLoweringX8632.h - x86-32 lowering ---*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file declares the TargetLoweringX8632 class, which 10 // This file declares the TargetLoweringX8632 class, which
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21 #include "IceInstX8632.h" 21 #include "IceInstX8632.h"
22 22
23 namespace Ice { 23 namespace Ice {
24 24
25 class TargetX8632 : public TargetLowering { 25 class TargetX8632 : public TargetLowering {
26 public: 26 public:
27 static TargetX8632 *create(Cfg *Func) { return new TargetX8632(Func); } 27 static TargetX8632 *create(Cfg *Func) { return new TargetX8632(Func); }
28 28
29 virtual void translateOm1(); 29 virtual void translateOm1();
30 virtual void translateO2(); 30 virtual void translateO2();
31 virtual bool doBranchOpt(Inst *I, const CfgNode *NextNode);
31 32
32 virtual Variable *getPhysicalRegister(SizeT RegNum); 33 virtual Variable *getPhysicalRegister(SizeT RegNum);
33 virtual IceString getRegName(SizeT RegNum, Type Ty) const; 34 virtual IceString getRegName(SizeT RegNum, Type Ty) const;
34 virtual llvm::SmallBitVector getRegisterSet(RegSetMask Include, 35 virtual llvm::SmallBitVector getRegisterSet(RegSetMask Include,
35 RegSetMask Exclude) const; 36 RegSetMask Exclude) const;
36 virtual const llvm::SmallBitVector &getRegisterSetForType(Type Ty) const { 37 virtual const llvm::SmallBitVector &getRegisterSetForType(Type Ty) const {
37 return TypeToRegisterSet[Ty]; 38 return TypeToRegisterSet[Ty];
38 } 39 }
39 virtual bool hasFramePointer() const { return IsEbpBasedFrame; } 40 virtual bool hasFramePointer() const { return IsEbpBasedFrame; }
40 virtual SizeT getFrameOrStackReg() const { 41 virtual SizeT getFrameOrStackReg() const {
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510 }; 511 };
511 512
512 template <> void ConstantInteger32::emit(GlobalContext *Ctx) const; 513 template <> void ConstantInteger32::emit(GlobalContext *Ctx) const;
513 template <> void ConstantInteger64::emit(GlobalContext *Ctx) const; 514 template <> void ConstantInteger64::emit(GlobalContext *Ctx) const;
514 template <> void ConstantFloat::emit(GlobalContext *Ctx) const; 515 template <> void ConstantFloat::emit(GlobalContext *Ctx) const;
515 template <> void ConstantDouble::emit(GlobalContext *Ctx) const; 516 template <> void ConstantDouble::emit(GlobalContext *Ctx) const;
516 517
517 } // end of namespace Ice 518 } // end of namespace Ice
518 519
519 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8632_H 520 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8632_H
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