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Issue 5798002: Provide baseline for new GC infrastructure. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 10 years ago
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1 // Copyright 2010 the V8 project authors. All rights reserved. 1 // Copyright 2010 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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7679 // Bring addresses into index1 and index2. 7679 // Bring addresses into index1 and index2.
7680 __ lea(index1.reg(), FixedArrayElementOperand(tmp1.reg(), index1.reg())); 7680 __ lea(index1.reg(), FixedArrayElementOperand(tmp1.reg(), index1.reg()));
7681 __ lea(index2.reg(), FixedArrayElementOperand(tmp1.reg(), index2.reg())); 7681 __ lea(index2.reg(), FixedArrayElementOperand(tmp1.reg(), index2.reg()));
7682 7682
7683 // Swap elements. 7683 // Swap elements.
7684 __ mov(object.reg(), Operand(index1.reg(), 0)); 7684 __ mov(object.reg(), Operand(index1.reg(), 0));
7685 __ mov(tmp2.reg(), Operand(index2.reg(), 0)); 7685 __ mov(tmp2.reg(), Operand(index2.reg(), 0));
7686 __ mov(Operand(index2.reg(), 0), object.reg()); 7686 __ mov(Operand(index2.reg(), 0), object.reg());
7687 __ mov(Operand(index1.reg(), 0), tmp2.reg()); 7687 __ mov(Operand(index1.reg(), 0), tmp2.reg());
7688 7688
7689 Label done; 7689 if (!FLAG_new_gc) {
7690 __ InNewSpace(tmp1.reg(), tmp2.reg(), equal, &done); 7690 Label done;
7691 // Possible optimization: do a check that both values are Smis 7691 __ InNewSpace(tmp1.reg(), tmp2.reg(), equal, &done);
7692 // (or them and test against Smi mask.) 7692 // Possible optimization: do a check that both values are Smis
7693 // (or them and test against Smi mask.)
7693 7694
7694 __ mov(tmp2.reg(), tmp1.reg()); 7695 __ mov(tmp2.reg(), tmp1.reg());
7695 __ RecordWriteHelper(tmp2.reg(), index1.reg(), object.reg()); 7696 __ RecordWriteHelper(tmp2.reg(), index1.reg(), object.reg());
7696 __ RecordWriteHelper(tmp1.reg(), index2.reg(), object.reg()); 7697 __ RecordWriteHelper(tmp1.reg(), index2.reg(), object.reg());
7697 __ bind(&done); 7698 __ bind(&done);
7699 }
7698 7700
7699 deferred->BindExit(); 7701 deferred->BindExit();
7700 frame_->Push(Factory::undefined_value()); 7702 frame_->Push(Factory::undefined_value());
7701 } 7703 }
7702 7704
7703 7705
7704 void CodeGenerator::GenerateCallFunction(ZoneList<Expression*>* args) { 7706 void CodeGenerator::GenerateCallFunction(ZoneList<Expression*>* args) {
7705 Comment cmnt(masm_, "[ GenerateCallFunction"); 7707 Comment cmnt(masm_, "[ GenerateCallFunction");
7706 7708
7707 ASSERT(args->length() >= 2); 7709 ASSERT(args->length() >= 2);
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9625 // If the receiver and the value share a register allocate a new 9627 // If the receiver and the value share a register allocate a new
9626 // register for the receiver. 9628 // register for the receiver.
9627 if (receiver.reg().is(value.reg())) { 9629 if (receiver.reg().is(value.reg())) {
9628 receiver = allocator()->Allocate(); 9630 receiver = allocator()->Allocate();
9629 ASSERT(receiver.is_valid()); 9631 ASSERT(receiver.is_valid());
9630 __ mov(receiver.reg(), Operand(value.reg())); 9632 __ mov(receiver.reg(), Operand(value.reg()));
9631 } 9633 }
9632 9634
9633 // Update the write barrier. To save instructions in the inlined 9635 // Update the write barrier. To save instructions in the inlined
9634 // version we do not filter smis. 9636 // version we do not filter smis.
9635 Label skip_write_barrier; 9637 int delta_to_record_write = 0x0001;
Erik Corry 2010/12/13 19:58:28 Why is this suddenly an unnamed constant?
9636 __ InNewSpace(receiver.reg(), value.reg(), equal, &skip_write_barrier); 9638 if (!FLAG_new_gc) {
9637 int delta_to_record_write = masm_->SizeOfCodeGeneratedSince(&patch_site); 9639 Label skip_write_barrier;
9638 __ lea(scratch.reg(), Operand(receiver.reg(), offset)); 9640 __ InNewSpace(receiver.reg(), value.reg(), equal, &skip_write_barrier);
9639 __ RecordWriteHelper(receiver.reg(), scratch.reg(), value.reg()); 9641 delta_to_record_write = masm_->SizeOfCodeGeneratedSince(&patch_site);
9640 if (FLAG_debug_code) { 9642 __ lea(scratch.reg(), Operand(receiver.reg(), offset));
9641 __ mov(receiver.reg(), Immediate(BitCast<int32_t>(kZapValue))); 9643 __ RecordWriteHelper(receiver.reg(), scratch.reg(), value.reg());
9642 __ mov(value.reg(), Immediate(BitCast<int32_t>(kZapValue))); 9644 if (FLAG_debug_code) {
9643 __ mov(scratch.reg(), Immediate(BitCast<int32_t>(kZapValue))); 9645 __ mov(receiver.reg(), Immediate(BitCast<int32_t>(kZapValue)));
9646 __ mov(value.reg(), Immediate(BitCast<int32_t>(kZapValue)));
9647 __ mov(scratch.reg(), Immediate(BitCast<int32_t>(kZapValue)));
9648 }
9649 __ bind(&skip_write_barrier);
9644 } 9650 }
9645 __ bind(&skip_write_barrier); 9651
9646 value.Unuse(); 9652 value.Unuse();
9647 scratch.Unuse(); 9653 scratch.Unuse();
9648 receiver.Unuse(); 9654 receiver.Unuse();
9649 done.Jump(&result); 9655 done.Jump(&result);
9650 9656
9651 slow.Bind(&value, &receiver); 9657 slow.Bind(&value, &receiver);
9652 frame()->Push(&receiver); 9658 frame()->Push(&receiver);
9653 frame()->Push(&value); 9659 frame()->Push(&value);
9654 result = frame()->CallStoreIC(name, is_contextual); 9660 result = frame()->CallStoreIC(name, is_contextual);
9655 // Encode the offset to the map check instruction and the offset 9661 // Encode the offset to the map check instruction and the offset
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10217 memcpy(chunk->GetStartAddress(), desc.buffer, desc.instr_size); 10223 memcpy(chunk->GetStartAddress(), desc.buffer, desc.instr_size);
10218 CPU::FlushICache(chunk->GetStartAddress(), desc.instr_size); 10224 CPU::FlushICache(chunk->GetStartAddress(), desc.instr_size);
10219 return FUNCTION_CAST<MemCopyFunction>(chunk->GetStartAddress()); 10225 return FUNCTION_CAST<MemCopyFunction>(chunk->GetStartAddress());
10220 } 10226 }
10221 10227
10222 #undef __ 10228 #undef __
10223 10229
10224 } } // namespace v8::internal 10230 } } // namespace v8::internal
10225 10231
10226 #endif // V8_TARGET_ARCH_IA32 10232 #endif // V8_TARGET_ARCH_IA32
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