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Issue 579273002: MIPS: Convert KeyedLoad indexed interceptor case to a Handler. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 3 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 5
6 #include "src/v8.h" 6 #include "src/v8.h"
7 7
8 #if V8_TARGET_ARCH_MIPS64 8 #if V8_TARGET_ARCH_MIPS64
9 9
10 #include "src/codegen.h" 10 #include "src/codegen.h"
(...skipping 878 matching lines...) Expand 10 before | Expand all | Expand 10 after
889 KeyedStoreGenerateGenericHelper( 889 KeyedStoreGenerateGenericHelper(
890 masm, &fast_object, &fast_double, &slow, kCheckMap, kDontIncrementLength, 890 masm, &fast_object, &fast_double, &slow, kCheckMap, kDontIncrementLength,
891 value, key, receiver, receiver_map, elements_map, elements); 891 value, key, receiver, receiver_map, elements_map, elements);
892 KeyedStoreGenerateGenericHelper(masm, &fast_object_grow, &fast_double_grow, 892 KeyedStoreGenerateGenericHelper(masm, &fast_object_grow, &fast_double_grow,
893 &slow, kDontCheckMap, kIncrementLength, value, 893 &slow, kDontCheckMap, kIncrementLength, value,
894 key, receiver, receiver_map, elements_map, 894 key, receiver, receiver_map, elements_map,
895 elements); 895 elements);
896 } 896 }
897 897
898 898
899 void KeyedLoadIC::GenerateIndexedInterceptor(MacroAssembler* masm) {
900 // Return address is in ra.
901 Label slow;
902
903 Register receiver = LoadDescriptor::ReceiverRegister();
904 Register key = LoadDescriptor::NameRegister();
905 Register scratch1 = a3;
906 Register scratch2 = a4;
907 DCHECK(!scratch1.is(receiver) && !scratch1.is(key));
908 DCHECK(!scratch2.is(receiver) && !scratch2.is(key));
909
910 // Check that the receiver isn't a smi.
911 __ JumpIfSmi(receiver, &slow);
912
913 // Check that the key is an array index, that is Uint32.
914 __ And(a4, key, Operand(kSmiTagMask | kSmiSignMask));
915 __ Branch(&slow, ne, a4, Operand(zero_reg));
916
917 // Get the map of the receiver.
918 __ ld(scratch1, FieldMemOperand(receiver, HeapObject::kMapOffset));
919
920 // Check that it has indexed interceptor and access checks
921 // are not enabled for this object.
922 __ lbu(scratch2, FieldMemOperand(scratch1, Map::kBitFieldOffset));
923 __ And(scratch2, scratch2, Operand(kSlowCaseBitFieldMask));
924 __ Branch(&slow, ne, scratch2, Operand(1 << Map::kHasIndexedInterceptor));
925 // Everything is fine, call runtime.
926 __ Push(receiver, key); // Receiver, key.
927
928 // Perform tail call to the entry.
929 __ TailCallExternalReference(
930 ExternalReference(IC_Utility(kLoadElementWithInterceptor),
931 masm->isolate()),
932 2, 1);
933
934 __ bind(&slow);
935 GenerateMiss(masm);
936 }
937
938
939 void KeyedStoreIC::GenerateMiss(MacroAssembler* masm) { 899 void KeyedStoreIC::GenerateMiss(MacroAssembler* masm) {
940 // Push receiver, key and value for runtime call. 900 // Push receiver, key and value for runtime call.
941 __ Push(StoreDescriptor::ReceiverRegister(), StoreDescriptor::NameRegister(), 901 __ Push(StoreDescriptor::ReceiverRegister(), StoreDescriptor::NameRegister(),
942 StoreDescriptor::ValueRegister()); 902 StoreDescriptor::ValueRegister());
943 903
944 ExternalReference ref = 904 ExternalReference ref =
945 ExternalReference(IC_Utility(kKeyedStoreIC_Miss), masm->isolate()); 905 ExternalReference(IC_Utility(kKeyedStoreIC_Miss), masm->isolate());
946 __ TailCallExternalReference(ref, 3, 1); 906 __ TailCallExternalReference(ref, 3, 1);
947 } 907 }
948 908
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1088 patcher.ChangeBranchCondition(ne); 1048 patcher.ChangeBranchCondition(ne);
1089 } else { 1049 } else {
1090 DCHECK(Assembler::IsBne(branch_instr)); 1050 DCHECK(Assembler::IsBne(branch_instr));
1091 patcher.ChangeBranchCondition(eq); 1051 patcher.ChangeBranchCondition(eq);
1092 } 1052 }
1093 } 1053 }
1094 } 1054 }
1095 } // namespace v8::internal 1055 } // namespace v8::internal
1096 1056
1097 #endif // V8_TARGET_ARCH_MIPS64 1057 #endif // V8_TARGET_ARCH_MIPS64
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