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Side by Side Diff: src/mips/macro-assembler-mips.h

Issue 57873004: MIPS: Handle constants in new space by making macro-assembler smarter. (Closed) Base URL: https://github.com/v8/v8.git@gbl
Patch Set: Created 7 years, 1 month ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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286 Heap::RootListIndex index, 286 Heap::RootListIndex index,
287 Condition cond, Register src1, const Operand& src2); 287 Condition cond, Register src1, const Operand& src2);
288 288
289 // Store an object to the root table. 289 // Store an object to the root table.
290 void StoreRoot(Register source, 290 void StoreRoot(Register source,
291 Heap::RootListIndex index); 291 Heap::RootListIndex index);
292 void StoreRoot(Register source, 292 void StoreRoot(Register source,
293 Heap::RootListIndex index, 293 Heap::RootListIndex index,
294 Condition cond, Register src1, const Operand& src2); 294 Condition cond, Register src1, const Operand& src2);
295 295
296 void LoadHeapObject(Register dst, Handle<HeapObject> object);
297
298 void LoadObject(Register result, Handle<Object> object) {
299 AllowDeferredHandleDereference heap_object_check;
300 if (object->IsHeapObject()) {
301 LoadHeapObject(result, Handle<HeapObject>::cast(object));
302 } else {
303 li(result, object);
304 }
305 }
306
307 // --------------------------------------------------------------------------- 296 // ---------------------------------------------------------------------------
308 // GC Support 297 // GC Support
309 298
310 void IncrementalMarkingRecordWriteHelper(Register object, 299 void IncrementalMarkingRecordWriteHelper(Register object,
311 Register value, 300 Register value,
312 Register address); 301 Register address);
313 302
314 enum RememberedSetFinalAction { 303 enum RememberedSetFinalAction {
315 kReturnAtEnd, 304 kReturnAtEnd,
316 kFallThroughAtEnd 305 kFallThroughAtEnd
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613 // --------------------------------------------------------------------------- 602 // ---------------------------------------------------------------------------
614 // Pseudo-instructions. 603 // Pseudo-instructions.
615 604
616 void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); } 605 void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); }
617 606
618 // Load int32 in the rd register. 607 // Load int32 in the rd register.
619 void li(Register rd, Operand j, LiFlags mode = OPTIMIZE_SIZE); 608 void li(Register rd, Operand j, LiFlags mode = OPTIMIZE_SIZE);
620 inline void li(Register rd, int32_t j, LiFlags mode = OPTIMIZE_SIZE) { 609 inline void li(Register rd, int32_t j, LiFlags mode = OPTIMIZE_SIZE) {
621 li(rd, Operand(j), mode); 610 li(rd, Operand(j), mode);
622 } 611 }
623 inline void li(Register dst, Handle<Object> value, 612 void li(Register dst, Handle<Object> value, LiFlags mode = OPTIMIZE_SIZE);
624 LiFlags mode = OPTIMIZE_SIZE) {
625 li(dst, Operand(value), mode);
626 }
627 613
628 // Push multiple registers on the stack. 614 // Push multiple registers on the stack.
629 // Registers are saved in numerical order, with higher numbered registers 615 // Registers are saved in numerical order, with higher numbered registers
630 // saved in higher memory addresses. 616 // saved in higher memory addresses.
631 void MultiPush(RegList regs); 617 void MultiPush(RegList regs);
632 void MultiPushReversed(RegList regs); 618 void MultiPushReversed(RegList regs);
633 619
634 void MultiPushFPU(RegList regs); 620 void MultiPushFPU(RegList regs);
635 void MultiPushReversedFPU(RegList regs); 621 void MultiPushReversedFPU(RegList regs);
636 622
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1656 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x) 1642 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x)
1657 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) 1643 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
1658 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> 1644 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm->
1659 #else 1645 #else
1660 #define ACCESS_MASM(masm) masm-> 1646 #define ACCESS_MASM(masm) masm->
1661 #endif 1647 #endif
1662 1648
1663 } } // namespace v8::internal 1649 } } // namespace v8::internal
1664 1650
1665 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 1651 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
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