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Issue 575373004: Convert KeyedLoad indexed interceptor case to a Handler. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: REBASE and ports. Created 6 years, 3 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 5
6 #include "src/v8.h" 6 #include "src/v8.h"
7 7
8 #if V8_TARGET_ARCH_MIPS 8 #if V8_TARGET_ARCH_MIPS
9 9
10 #include "src/codegen.h" 10 #include "src/codegen.h"
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880 KeyedStoreGenerateGenericHelper( 880 KeyedStoreGenerateGenericHelper(
881 masm, &fast_object, &fast_double, &slow, kCheckMap, kDontIncrementLength, 881 masm, &fast_object, &fast_double, &slow, kCheckMap, kDontIncrementLength,
882 value, key, receiver, receiver_map, elements_map, elements); 882 value, key, receiver, receiver_map, elements_map, elements);
883 KeyedStoreGenerateGenericHelper(masm, &fast_object_grow, &fast_double_grow, 883 KeyedStoreGenerateGenericHelper(masm, &fast_object_grow, &fast_double_grow,
884 &slow, kDontCheckMap, kIncrementLength, value, 884 &slow, kDontCheckMap, kIncrementLength, value,
885 key, receiver, receiver_map, elements_map, 885 key, receiver, receiver_map, elements_map,
886 elements); 886 elements);
887 } 887 }
888 888
889 889
890 void KeyedLoadIC::GenerateIndexedInterceptor(MacroAssembler* masm) {
891 // Return address is in ra.
892 Label slow;
893
894 Register receiver = LoadDescriptor::ReceiverRegister();
895 Register key = LoadDescriptor::NameRegister();
896 Register scratch1 = a3;
897 Register scratch2 = t0;
898 DCHECK(!scratch1.is(receiver) && !scratch1.is(key));
899 DCHECK(!scratch2.is(receiver) && !scratch2.is(key));
900
901 // Check that the receiver isn't a smi.
902 __ JumpIfSmi(receiver, &slow);
903
904 // Check that the key is an array index, that is Uint32.
905 __ And(t0, key, Operand(kSmiTagMask | kSmiSignMask));
906 __ Branch(&slow, ne, t0, Operand(zero_reg));
907
908 // Get the map of the receiver.
909 __ lw(scratch1, FieldMemOperand(receiver, HeapObject::kMapOffset));
910
911 // Check that it has indexed interceptor and access checks
912 // are not enabled for this object.
913 __ lbu(scratch2, FieldMemOperand(scratch1, Map::kBitFieldOffset));
914 __ And(scratch2, scratch2, Operand(kSlowCaseBitFieldMask));
915 __ Branch(&slow, ne, scratch2, Operand(1 << Map::kHasIndexedInterceptor));
916 // Everything is fine, call runtime.
917 __ Push(receiver, key); // Receiver, key.
918
919 // Perform tail call to the entry.
920 __ TailCallExternalReference(
921 ExternalReference(IC_Utility(kLoadElementWithInterceptor),
922 masm->isolate()),
923 2, 1);
924
925 __ bind(&slow);
926 GenerateMiss(masm);
927 }
928
929
930 void KeyedStoreIC::GenerateMiss(MacroAssembler* masm) { 890 void KeyedStoreIC::GenerateMiss(MacroAssembler* masm) {
931 // Push receiver, key and value for runtime call. 891 // Push receiver, key and value for runtime call.
932 __ Push(StoreDescriptor::ReceiverRegister(), StoreDescriptor::NameRegister(), 892 __ Push(StoreDescriptor::ReceiverRegister(), StoreDescriptor::NameRegister(),
933 StoreDescriptor::ValueRegister()); 893 StoreDescriptor::ValueRegister());
934 894
935 ExternalReference ref = 895 ExternalReference ref =
936 ExternalReference(IC_Utility(kKeyedStoreIC_Miss), masm->isolate()); 896 ExternalReference(IC_Utility(kKeyedStoreIC_Miss), masm->isolate());
937 __ TailCallExternalReference(ref, 3, 1); 897 __ TailCallExternalReference(ref, 3, 1);
938 } 898 }
939 899
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1081 patcher.ChangeBranchCondition(ne); 1041 patcher.ChangeBranchCondition(ne);
1082 } else { 1042 } else {
1083 DCHECK(Assembler::IsBne(branch_instr)); 1043 DCHECK(Assembler::IsBne(branch_instr));
1084 patcher.ChangeBranchCondition(eq); 1044 patcher.ChangeBranchCondition(eq);
1085 } 1045 }
1086 } 1046 }
1087 } 1047 }
1088 } // namespace v8::internal 1048 } // namespace v8::internal
1089 1049
1090 #endif // V8_TARGET_ARCH_MIPS 1050 #endif // V8_TARGET_ARCH_MIPS
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