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Side by Side Diff: src/IceRegistersX8632.h

Issue 574133002: Add initial integrated assembler w/ some Xmm ops. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: remove duplicate pxor, and use enum Created 6 years, 3 months ago
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1 //===- subzero/src/IceRegistersX8632.h - Register information ---*- C++ -*-===// 1 //===- subzero/src/IceRegistersX8632.h - Register information ---*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file declares the registers and their encodings for x86-32. 10 // This file declares the registers and their encodings for x86-32.
11 // 11 //
12 //===----------------------------------------------------------------------===// 12 //===----------------------------------------------------------------------===//
13 13
14 #ifndef SUBZERO_SRC_ICEREGISTERSX8632_H 14 #ifndef SUBZERO_SRC_ICEREGISTERSX8632_H
15 #define SUBZERO_SRC_ICEREGISTERSX8632_H 15 #define SUBZERO_SRC_ICEREGISTERSX8632_H
16 16
17 #include "IceDefs.h" 17 #include "IceDefs.h"
18 #include "IceInstX8632.def" 18 #include "IceInstX8632.def"
19 19
20 namespace Ice { 20 namespace Ice {
21 21
22 class RegX8632 { 22 namespace RegX8632 {
23 public: 23
24 // An enum of every register. The enum value may not match the encoding 24 // An enum of every register. The enum value may not match the encoding
25 // used to binary encode register operands in instructions. 25 // used to binary encode register operands in instructions.
26 enum AllRegisters { 26 enum AllRegisters {
27 #define X(val, encode, name, name16, name8, scratch, preserved, stackptr, \ 27 #define X(val, encode, name, name16, name8, scratch, preserved, stackptr, \
28 frameptr, isI8, isInt, isFP) \ 28 frameptr, isI8, isInt, isFP) \
29 val, 29 val,
30 REGX8632_TABLE 30 REGX8632_TABLE
31 #undef X 31 #undef X
32 Reg_NUM, 32 Reg_NUM,
33 #define X(val, init) val init, 33 #define X(val, init) val init,
34 REGX8632_TABLE_BOUNDS 34 REGX8632_TABLE_BOUNDS
35 #undef X 35 #undef X
36 }; 36 };
37 37
38 // An enum of GPR Registers. The enum value does match encoding used 38 // An enum of GPR Registers. The enum value does match encoding used
39 // to binary encode register operands in instructions. 39 // to binary encode register operands in instructions.
40 enum GPRRegister { 40 enum GPRRegister {
41 #define X(val, encode, name, name16, name8, scratch, preserved, stackptr, \ 41 #define X(val, encode, name, name16, name8, scratch, preserved, stackptr, \
42 frameptr, isI8, isInt, isFP) \ 42 frameptr, isI8, isInt, isFP) \
43 Encoded_##val encode, 43 Encoded_##val encode,
44 REGX8632_GPR_TABLE 44 REGX8632_GPR_TABLE
45 #undef X 45 #undef X
46 }; 46 Encoded_Not_GPR = -1
47 };
47 48
48 // An enum of XMM Registers. The enum value does match encoding used 49 // An enum of XMM Registers. The enum value does match encoding used
49 // to binary encode register operands in instructions. 50 // to binary encode register operands in instructions.
50 enum XmmRegister { 51 enum XmmRegister {
51 #define X(val, encode, name, name16, name8, scratch, preserved, stackptr, \ 52 #define X(val, encode, name, name16, name8, scratch, preserved, stackptr, \
52 frameptr, isI8, isInt, isFP) \ 53 frameptr, isI8, isInt, isFP) \
53 Encoded_##val encode, 54 Encoded_##val encode,
54 REGX8632_XMM_TABLE 55 REGX8632_XMM_TABLE
55 #undef X 56 #undef X
56 }; 57 Encoded_Not_Xmm = -1
58 };
57 59
58 // An enum of Byte Registers. The enum value does match encoding used 60 // An enum of Byte Registers. The enum value does match encoding used
59 // to binary encode register operands in instructions. 61 // to binary encode register operands in instructions.
60 enum ByteRegister { 62 enum ByteRegister {
61 #define X(val, encode) Encoded_##val encode, 63 #define X(val, encode) Encoded_##val encode,
62 REGX8632_BYTEREG_TABLE 64 REGX8632_BYTEREG_TABLE
63 #undef X 65 #undef X
64 }; 66 Encoded_Not_ByteReg = -1
67 };
65 68
66 static GPRRegister getEncodedGPR(int32_t RegNum) { 69 static inline GPRRegister getEncodedGPR(int32_t RegNum) {
67 assert(Reg_GPR_First <= RegNum && RegNum <= Reg_GPR_Last); 70 assert(Reg_GPR_First <= RegNum && RegNum <= Reg_GPR_Last);
68 return GPRRegister(RegNum - Reg_GPR_First); 71 return GPRRegister(RegNum - Reg_GPR_First);
69 } 72 }
70 73
71 static XmmRegister getEncodedXmm(int32_t RegNum) { 74 static inline XmmRegister getEncodedXmm(int32_t RegNum) {
72 assert(Reg_XMM_First <= RegNum && RegNum <= Reg_XMM_Last); 75 assert(Reg_XMM_First <= RegNum && RegNum <= Reg_XMM_Last);
73 return XmmRegister(RegNum - Reg_XMM_First); 76 return XmmRegister(RegNum - Reg_XMM_First);
74 } 77 }
75 78
76 static ByteRegister getEncodedByteReg(int32_t RegNum) { 79 static inline ByteRegister getEncodedByteReg(int32_t RegNum) {
77 assert(RegNum == Reg_ah || (Reg_GPR_First <= RegNum && RegNum <= Reg_ebx)); 80 assert(RegNum == Reg_ah || (Reg_GPR_First <= RegNum && RegNum <= Reg_ebx));
78 if (RegNum == Reg_ah) 81 if (RegNum == Reg_ah)
79 return Encoded_Reg_ah; 82 return Encoded_Reg_ah;
80 return ByteRegister(RegNum - Reg_GPR_First); 83 return ByteRegister(RegNum - Reg_GPR_First);
81 } 84 }
82 }; 85
86 } // end of namespace RegX8632
83 87
84 } // end of namespace Ice 88 } // end of namespace Ice
85 89
86 #endif // SUBZERO_SRC_ICEREGISTERSX8632_H 90 #endif // SUBZERO_SRC_ICEREGISTERSX8632_H
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