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Side by Side Diff: src/IceInst.h

Issue 574133002: Add initial integrated assembler w/ some Xmm ops. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: more cleanup Created 6 years, 3 months ago
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1 //===- subzero/src/IceInst.h - High-level instructions ----------*- C++ -*-===// 1 //===- subzero/src/IceInst.h - High-level instructions ----------*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file declares the Inst class and its target-independent 10 // This file declares the Inst class and its target-independent
(...skipping 90 matching lines...) Expand 10 before | Expand all | Expand 10 after
101 void livenessLightweight(llvm::BitVector &Live); 101 void livenessLightweight(llvm::BitVector &Live);
102 void liveness(InstNumberT InstNumber, llvm::BitVector &Live, 102 void liveness(InstNumberT InstNumber, llvm::BitVector &Live,
103 Liveness *Liveness, const CfgNode *Node); 103 Liveness *Liveness, const CfgNode *Node);
104 104
105 // Get the number of native instructions that this instruction 105 // Get the number of native instructions that this instruction
106 // ultimately emits. By default, high-level instructions don't 106 // ultimately emits. By default, high-level instructions don't
107 // result in any native instructions, and a target-specific 107 // result in any native instructions, and a target-specific
108 // instruction results in a single native instruction. 108 // instruction results in a single native instruction.
109 virtual uint32_t getEmitInstCount() const { return 0; } 109 virtual uint32_t getEmitInstCount() const { return 0; }
110 virtual void emit(const Cfg *Func) const; 110 virtual void emit(const Cfg *Func) const;
111 virtual void emitIAS(const Cfg *Func) const;
111 virtual void dump(const Cfg *Func) const; 112 virtual void dump(const Cfg *Func) const;
112 virtual void dumpExtras(const Cfg *Func) const; 113 virtual void dumpExtras(const Cfg *Func) const;
113 void dumpDecorated(const Cfg *Func) const; 114 void dumpDecorated(const Cfg *Func) const;
114 void emitSources(const Cfg *Func) const; 115 void emitSources(const Cfg *Func) const;
115 void dumpSources(const Cfg *Func) const; 116 void dumpSources(const Cfg *Func) const;
116 void dumpDest(const Cfg *Func) const; 117 void dumpDest(const Cfg *Func) const;
117 virtual bool isRedundantAssign() const { return false; } 118 virtual bool isRedundantAssign() const { return false; }
118 119
119 virtual ~Inst() {} 120 virtual ~Inst() {}
120 121
(...skipping 645 matching lines...) Expand 10 before | Expand all | Expand 10 after
766 assert(Kind >= Target); 767 assert(Kind >= Target);
767 } 768 }
768 InstTarget(const InstTarget &) LLVM_DELETED_FUNCTION; 769 InstTarget(const InstTarget &) LLVM_DELETED_FUNCTION;
769 InstTarget &operator=(const InstTarget &) LLVM_DELETED_FUNCTION; 770 InstTarget &operator=(const InstTarget &) LLVM_DELETED_FUNCTION;
770 virtual ~InstTarget() {} 771 virtual ~InstTarget() {}
771 }; 772 };
772 773
773 } // end of namespace Ice 774 } // end of namespace Ice
774 775
775 #endif // SUBZERO_SRC_ICEINST_H 776 #endif // SUBZERO_SRC_ICEINST_H
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