Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(88)

Side by Side Diff: src/arm/macro-assembler-arm.h

Issue 5736008: Provide baseline for experimental GC implementation. (Closed) Base URL: https://v8.googlecode.com/svn/branches/experimental/gc
Patch Set: Created 10 years ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
OLDNEW
1 // Copyright 2010 the V8 project authors. All rights reserved. 1 // Copyright 2010 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 112 matching lines...) Expand 10 before | Expand all | Expand 10 after
123 void SmiJumpTable(Register index, Vector<Label*> targets); 123 void SmiJumpTable(Register index, Vector<Label*> targets);
124 // Load an object from the root table. 124 // Load an object from the root table.
125 void LoadRoot(Register destination, 125 void LoadRoot(Register destination,
126 Heap::RootListIndex index, 126 Heap::RootListIndex index,
127 Condition cond = al); 127 Condition cond = al);
128 // Store an object to the root table. 128 // Store an object to the root table.
129 void StoreRoot(Register source, 129 void StoreRoot(Register source,
130 Heap::RootListIndex index, 130 Heap::RootListIndex index,
131 Condition cond = al); 131 Condition cond = al);
132 132
133 133 #ifdef ENABLE_CARDMARKING_WRITE_BARRIER
134 // Check if object is in new space. 134 // Check if object is in new space.
135 // scratch can be object itself, but it will be clobbered. 135 // scratch can be object itself, but it will be clobbered.
136 void InNewSpace(Register object, 136 void InNewSpace(Register object,
137 Register scratch, 137 Register scratch,
138 Condition cc, // eq for new space, ne otherwise 138 Condition cc, // eq for new space, ne otherwise
139 Label* branch); 139 Label* branch);
140 140
141 141
142 // For the page containing |object| mark the region covering [address] 142 // For the page containing |object| mark the region covering [address]
143 // dirty. The object address must be in the first 8K of an allocated page. 143 // dirty. The object address must be in the first 8K of an allocated page.
(...skipping 13 matching lines...) Expand all
157 Register scratch1); 157 Register scratch1);
158 158
159 // For the page containing |object| mark the region covering 159 // For the page containing |object| mark the region covering
160 // [address] dirty. The object address must be in the first 8K of an 160 // [address] dirty. The object address must be in the first 8K of an
161 // allocated page. All 3 registers are clobbered by the operation, 161 // allocated page. All 3 registers are clobbered by the operation,
162 // as well as the ip register. RecordWrite updates the write barrier 162 // as well as the ip register. RecordWrite updates the write barrier
163 // even when storing smis. 163 // even when storing smis.
164 void RecordWrite(Register object, 164 void RecordWrite(Register object,
165 Register address, 165 Register address,
166 Register scratch); 166 Register scratch);
167 #endif
167 168
168 // Push two registers. Pushes leftmost register first (to highest address). 169 // Push two registers. Pushes leftmost register first (to highest address).
169 void Push(Register src1, Register src2, Condition cond = al) { 170 void Push(Register src1, Register src2, Condition cond = al) {
170 ASSERT(!src1.is(src2)); 171 ASSERT(!src1.is(src2));
171 if (src1.code() > src2.code()) { 172 if (src1.code() > src2.code()) {
172 stm(db_w, sp, src1.bit() | src2.bit(), cond); 173 stm(db_w, sp, src1.bit() | src2.bit(), cond);
173 } else { 174 } else {
174 str(src1, MemOperand(sp, 4, NegPreIndex), cond); 175 str(src1, MemOperand(sp, 4, NegPreIndex), cond);
175 str(src2, MemOperand(sp, 4, NegPreIndex), cond); 176 str(src2, MemOperand(sp, 4, NegPreIndex), cond);
176 } 177 }
(...skipping 629 matching lines...) Expand 10 before | Expand all | Expand 10 after
806 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) 807 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
807 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> 808 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm->
808 #else 809 #else
809 #define ACCESS_MASM(masm) masm-> 810 #define ACCESS_MASM(masm) masm->
810 #endif 811 #endif
811 812
812 813
813 } } // namespace v8::internal 814 } } // namespace v8::internal
814 815
815 #endif // V8_ARM_MACRO_ASSEMBLER_ARM_H_ 816 #endif // V8_ARM_MACRO_ASSEMBLER_ARM_H_
OLDNEW

Powered by Google App Engine
This is Rietveld 408576698