Initial steps towards cleaning up integer arithmetic IR.

runtime/vm/intermediate_language_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_ARM.
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/intermediate_language.h"
 
 #include "vm/cpu.h"
@@ skipping 2827 matching lines @@
   }
   if (compiler->ForceSlowPathForStackOverflow()) {
     __ b(slow_path->entry_label());
   }
   __ Bind(slow_path->exit_label());
 }
 
 
 static void EmitSmiShiftLeft(FlowGraphCompiler* compiler,
                              BinarySmiOpInstr* shift_left) {
-  const bool is_truncating = shift_left->IsTruncating();
   const LocationSummary& locs = *shift_left->locs();
   const Register left = locs.in(0).reg();
   const Register result = locs.out(0).reg();
   Label* deopt = shift_left->CanDeoptimize() ?
       compiler->AddDeoptStub(shift_left->deopt_id(), ICData::kDeoptBinarySmiOp)
       : NULL;
   if (locs.in(1).IsConstant()) {
     const Object& constant = locs.in(1).constant();
     ASSERT(constant.IsSmi());
     // Immediate shift operation takes 5 bits for the count.
     const intptr_t kCountLimit = 0x1F;
     const intptr_t value = Smi::Cast(constant).Value();
-    if (value == 0) {
-      __ MoveRegister(result, left);
-    } else if ((value < 0) || (value >= kCountLimit)) {
-      // This condition may not be known earlier in some cases because
-      // of constant propagation, inlining, etc.
-      if ((value >= kCountLimit) && is_truncating) {
-        __ mov(result, Operand(0));
-      } else {
-        // Result is Mint or exception.
-        __ b(deopt);
-      }
-    } else {
-      if (!is_truncating) {
-        // Check for overflow (preserve left).
-        __ Lsl(IP, left, value);
-        __ cmp(left, Operand(IP, ASR, value));
-        __ b(deopt, NE);  // Overflow.
-      }
-      // Shift for result now we know there is no overflow.
-      __ Lsl(result, left, value);
+    ASSERT((0 < value) && (value < kCountLimit));
+    if (shift_left->can_overflow()) {
+      // Check for overflow (preserve left).
+      __ Lsl(IP, left, value);
+      __ cmp(left, Operand(IP, ASR, value));
+      __ b(deopt, NE);  // Overflow.
     }
+    // Shift for result now we know there is no overflow.
+    __ Lsl(result, left, value);
     return;
   }
 
   // Right (locs.in(1)) is not constant.
   const Register right = locs.in(1).reg();
   Range* right_range = shift_left->right()->definition()->range();
-  if (shift_left->left()->BindsToConstant() && !is_truncating) {
+  if (shift_left->left()->BindsToConstant() && shift_left->can_overflow()) {
     // TODO(srdjan): Implement code below for is_truncating().
     // If left is constant, we know the maximal allowed size for right.
     const Object& obj = shift_left->left()->BoundConstant();
     if (obj.IsSmi()) {
       const intptr_t left_int = Smi::Cast(obj).Value();
       if (left_int == 0) {
         __ cmp(right, Operand(0));
         __ b(deopt, MI);
         __ mov(result, Operand(0));
         return;
       }
       const intptr_t max_right = kSmiBits - Utils::HighestBit(left_int);
       const bool right_needs_check =
           !RangeUtils::IsWithin(right_range, 0, max_right - 1);
       if (right_needs_check) {
         __ cmp(right, Operand(reinterpret_cast<int32_t>(Smi::New(max_right))));
         __ b(deopt, CS);
       }
       __ SmiUntag(IP, right);
       __ Lsl(result, left, IP);
     }
     return;
   }
 
   const bool right_needs_check =
       !RangeUtils::IsWithin(right_range, 0, (Smi::kBits - 1));
-  if (is_truncating) {
+  if (!shift_left->can_overflow()) {
     if (right_needs_check) {
       const bool right_may_be_negative =
           (right_range == NULL) || !right_range->IsPositive();
       if (right_may_be_negative) {
         ASSERT(shift_left->CanDeoptimize());
         __ cmp(right, Operand(0));
         __ b(deopt, MI);
       }
 
       __ cmp(right, Operand(reinterpret_cast<int32_t>(Smi::New(Smi::kBits))));
@@ skipping 30 matching lines @@
   // Calculate number of temporaries.
   intptr_t num_temps = 0;
   if (op_kind() == Token::kTRUNCDIV) {
     if (RightIsPowerOfTwoConstant()) {
       num_temps = 1;
     } else {
       num_temps = 2;
     }
   } else if (op_kind() == Token::kMOD) {
     num_temps = 2;
-  } else if (((op_kind() == Token::kSHL) && !IsTruncating()) ||
+  } else if (((op_kind() == Token::kSHL) && can_overflow()) ||
              (op_kind() == Token::kSHR)) {
     num_temps = 1;
   } else if ((op_kind() == Token::kMUL) &&
              (TargetCPUFeatures::arm_version() != ARMv7)) {
     num_temps = 1;
   }
   LocationSummary* summary = new(isolate) LocationSummary(
       isolate, kNumInputs, num_temps, LocationSummary::kNoCall);
   if (op_kind() == Token::kTRUNCDIV) {
     summary->set_in(0, Location::RequiresRegister());
@@ skipping 12 matching lines @@
   if (op_kind() == Token::kMOD) {
     summary->set_in(0, Location::RequiresRegister());
     summary->set_in(1, Location::RequiresRegister());
     summary->set_temp(0, Location::RequiresRegister());
     summary->set_temp(1, Location::RequiresFpuRegister());
     summary->set_out(0, Location::RequiresRegister());
     return summary;
   }
   summary->set_in(0, Location::RequiresRegister());
   summary->set_in(1, Location::RegisterOrSmiConstant(right()));
-  if (((op_kind() == Token::kSHL) && !IsTruncating()) ||
+  if (((op_kind() == Token::kSHL) && can_overflow()) ||
       (op_kind() == Token::kSHR)) {
     summary->set_temp(0, Location::RequiresRegister());
   }
   if (op_kind() == Token::kMUL) {
     if (TargetCPUFeatures::arm_version() != ARMv7) {
       summary->set_temp(0, Location::RequiresFpuRegister());
     }
   }
   // We make use of 3-operand instructions by not requiring result register
   // to be identical to first input register as on Intel.
@@ skipping 37 matching lines @@
           // overflow when imm == kMinInt32.
           __ SubImmediateSetFlags(result, left, imm);
           __ b(deopt, VS);
         }
         break;
       }
       case Token::kMUL: {
         // Keep left value tagged and untag right value.
         const intptr_t value = Smi::Cast(constant).Value();
         if (deopt == NULL) {
-          if (value == 2) {
-            __ mov(result, Operand(left, LSL, 1));
-          } else {
+          __ LoadImmediate(IP, value);
+          __ mul(result, left, IP);
+        } else {
+          if (TargetCPUFeatures::arm_version() == ARMv7) {
             __ LoadImmediate(IP, value);
-            __ mul(result, left, IP);
-          }
-        } else {
-          if (value == 2) {
-            __ mov(IP, Operand(left, ASR, 31));  // IP = sign of left.
-            __ mov(result, Operand(left, LSL, 1));
+            __ smull(result, IP, left, IP);
             // IP: result bits 32..63.
             __ cmp(IP, Operand(result, ASR, 31));
             __ b(deopt, NE);
+          } else if (TargetCPUFeatures::can_divide()) {
+            const QRegister qtmp = locs()->temp(0).fpu_reg();
+            const DRegister dtmp0 = EvenDRegisterOf(qtmp);
+            const DRegister dtmp1 = OddDRegisterOf(qtmp);
+            __ LoadImmediate(IP, value);
+            __ CheckMultSignedOverflow(left, IP, result, dtmp0, dtmp1, deopt);
+            __ mul(result, left, IP);
           } else {
-            if (TargetCPUFeatures::arm_version() == ARMv7) {
-              __ LoadImmediate(IP, value);
-              __ smull(result, IP, left, IP);
-              // IP: result bits 32..63.
-              __ cmp(IP, Operand(result, ASR, 31));
-              __ b(deopt, NE);
-            } else if (TargetCPUFeatures::can_divide()) {
-              const QRegister qtmp = locs()->temp(0).fpu_reg();
-              const DRegister dtmp0 = EvenDRegisterOf(qtmp);
-              const DRegister dtmp1 = OddDRegisterOf(qtmp);
-              __ LoadImmediate(IP, value);
-              __ CheckMultSignedOverflow(left, IP, result, dtmp0, dtmp1, deopt);
-              __ mul(result, left, IP);
-            } else {
-             // TODO(vegorov): never emit this instruction if hardware does not
-             // support it! This will lead to deopt cycle penalizing the code.
-              __ b(deopt);
-            }
+           // TODO(vegorov): never emit this instruction if hardware does not
+           // support it! This will lead to deopt cycle penalizing the code.
+            __ b(deopt);
           }
         }
         break;
       }
       case Token::kTRUNCDIV: {
         const intptr_t value = Smi::Cast(constant).Value();
-        if (value == 1) {
-          __ MoveRegister(result, left);
-          break;
-        } else if (value == -1) {
-          // Check the corner case of dividing the 'MIN_SMI' with -1, in which
-          // case we cannot negate the result.
-          __ CompareImmediate(left, 0x80000000);
-          __ b(deopt, EQ);
-          __ rsb(result, left, Operand(0));
-          break;
-        }
         ASSERT(Utils::IsPowerOfTwo(Utils::Abs(value)));
         const intptr_t shift_count =
             Utils::ShiftForPowerOfTwo(Utils::Abs(value)) + kSmiTagSize;
         ASSERT(kSmiTagSize == 1);
         __ mov(IP, Operand(left, ASR, 31));
         ASSERT(shift_count > 1);  // 1, -1 case handled above.
         const Register temp = locs()->temp(0).reg();
         __ add(temp, left, Operand(IP, LSR, 32 - shift_count));
         ASSERT(shift_count > 0);
         __ mov(result, Operand(temp, ASR, shift_count));
@@ skipping 35 matching lines @@
         } else {
           __ LoadImmediate(IP, imm);
           __ eor(result, left, Operand(IP));
         }
         break;
       }
       case Token::kSHR: {
         // sarl operation masks the count to 5 bits.
         const intptr_t kCountLimit = 0x1F;
         intptr_t value = Smi::Cast(constant).Value();
-
-        if (value == 0) {
-          // TODO(vegorov): should be handled outside.
-          __ MoveRegister(result, left);
-          break;
-        } else if (value < 0) {
-          // TODO(vegorov): should be handled outside.
-          __ b(deopt);
-          break;
-        }
-
-        value = value + kSmiTagSize;
-        if (value >= kCountLimit) {
-          value = kCountLimit;
-        }
-
-        __ Asr(result, left, value);
+        __ Asr(result, left, Utils::Minimum(value + kSmiTagSize, kCountLimit));
         __ SmiTag(result);
         break;
       }
 
       default:
         UNREACHABLE();
         break;
     }
     return;
   }
@@ skipping 155 matching lines @@
     }
     default:
       UNREACHABLE();
       break;
   }
 }
 
 
 static void EmitInt32ShiftLeft(FlowGraphCompiler* compiler,
                                BinaryInt32OpInstr* shift_left) {
-  const bool is_truncating = shift_left->IsTruncating();
   const LocationSummary& locs = *shift_left->locs();
   const Register left = locs.in(0).reg();
   const Register result = locs.out(0).reg();
   Label* deopt = shift_left->CanDeoptimize() ?
       compiler->AddDeoptStub(shift_left->deopt_id(), ICData::kDeoptBinarySmiOp)
       : NULL;
   ASSERT(locs.in(1).IsConstant());
   const Object& constant = locs.in(1).constant();
   ASSERT(constant.IsSmi());
   // Immediate shift operation takes 5 bits for the count.
   const intptr_t kCountLimit = 0x1F;
   const intptr_t value = Smi::Cast(constant).Value();
-  if (value == 0) {
-    __ MoveRegister(result, left);
-  } else if ((value < 0) || (value >= kCountLimit)) {
-    // This condition may not be known earlier in some cases because
-    // of constant propagation, inlining, etc.
-    if ((value >= kCountLimit) && is_truncating) {
-      __ mov(result, Operand(0));
-    } else {
-      // Result is Mint or exception.
-      __ b(deopt);
-    }
-  } else {
-    if (!is_truncating) {
-      // Check for overflow (preserve left).
-      __ Lsl(IP, left, value);
-      __ cmp(left, Operand(IP, ASR, value));
-      __ b(deopt, NE);  // Overflow.
-    }
-    // Shift for result now we know there is no overflow.
-    __ Lsl(result, left, value);
+  ASSERT((0 < value) && (value < kCountLimit));
+  if (shift_left->can_overflow()) {
+    // Check for overflow (preserve left).
+    __ Lsl(IP, left, value);
+    __ cmp(left, Operand(IP, ASR, value));
+    __ b(deopt, NE);  // Overflow.
   }
+  // Shift for result now we know there is no overflow.
+  __ Lsl(result, left, value);
 }
 
 
 LocationSummary* BinaryInt32OpInstr::MakeLocationSummary(Isolate* isolate,
                                                          bool opt) const {
   const intptr_t kNumInputs = 2;
   // Calculate number of temporaries.
   intptr_t num_temps = 0;
-  if (((op_kind() == Token::kSHL) && !IsTruncating()) ||
+  if (((op_kind() == Token::kSHL) && can_overflow()) ||
       (op_kind() == Token::kSHR)) {
     num_temps = 1;
   } else if ((op_kind() == Token::kMUL) &&
              (TargetCPUFeatures::arm_version() != ARMv7)) {
     num_temps = 1;
   }
   LocationSummary* summary = new(isolate) LocationSummary(
       isolate, kNumInputs, num_temps, LocationSummary::kNoCall);
   summary->set_in(0, Location::RequiresRegister());
   summary->set_in(1, Location::RegisterOrSmiConstant(right()));
-  if (((op_kind() == Token::kSHL) && !IsTruncating()) ||
+  if (((op_kind() == Token::kSHL) && can_overflow()) ||
       (op_kind() == Token::kSHR)) {
     summary->set_temp(0, Location::RequiresRegister());
   }
   if (op_kind() == Token::kMUL) {
     if (TargetCPUFeatures::arm_version() != ARMv7) {
       summary->set_temp(0, Location::RequiresFpuRegister());
     }
   }
   // We make use of 3-operand instructions by not requiring result register
   // to be identical to first input register as on Intel.
@@ skipping 35 matching lines @@
         } else {
           // Negating value and using AddImmediateSetFlags would not detect the
           // overflow when value == kMinInt32.
           __ SubImmediateSetFlags(result, left, value);
           __ b(deopt, VS);
         }
         break;
       }
       case Token::kMUL: {
         if (deopt == NULL) {
-          if (value == 2) {
-            __ mov(result, Operand(left, LSL, 1));
+          __ LoadImmediate(IP, value);
+          __ mul(result, left, IP);
+        } else {
+          if (TargetCPUFeatures::arm_version() == ARMv7) {
+            __ LoadImmediate(IP, value);
+            __ smull(result, IP, left, IP);
+            // IP: result bits 32..63.
+            __ cmp(IP, Operand(result, ASR, 31));
+            __ b(deopt, NE);
+          } else if (TargetCPUFeatures::can_divide()) {
+            const QRegister qtmp = locs()->temp(0).fpu_reg();
+            const DRegister dtmp0 = EvenDRegisterOf(qtmp);
+            const DRegister dtmp1 = OddDRegisterOf(qtmp);
+            __ LoadImmediate(IP, value);
+            __ CheckMultSignedOverflow(left, IP, result, dtmp0, dtmp1, deopt);
+            __ mul(result, left, IP);
           } else {
-            __ LoadImmediate(IP, value);
-            __ mul(result, left, IP);
-          }
-        } else {
-          if (value == 2) {
-            __ CompareImmediate(left, 0xC0000000);
-            __ b(deopt, MI);
-            __ mov(result, Operand(left, LSL, 1));
-          } else {
-            if (TargetCPUFeatures::arm_version() == ARMv7) {
-              __ LoadImmediate(IP, value);
-              __ smull(result, IP, left, IP);
-              // IP: result bits 32..63.
-              __ cmp(IP, Operand(result, ASR, 31));
-              __ b(deopt, NE);
-            } else if (TargetCPUFeatures::can_divide()) {
-              const QRegister qtmp = locs()->temp(0).fpu_reg();
-              const DRegister dtmp0 = EvenDRegisterOf(qtmp);
-              const DRegister dtmp1 = OddDRegisterOf(qtmp);
-              __ LoadImmediate(IP, value);
-              __ CheckMultSignedOverflow(left, IP, result, dtmp0, dtmp1, deopt);
-              __ mul(result, left, IP);
-            } else {
-              // TODO(vegorov): never emit this instruction if hardware does not
-              // support it! This will lead to deopt cycle penalizing the code.
-              __ b(deopt);
-            }
+            // TODO(vegorov): never emit this instruction if hardware does not
+            // support it! This will lead to deopt cycle penalizing the code.
+            __ b(deopt);
           }
         }
         break;
       }
       case Token::kBIT_AND: {
         // No overflow check.
         Operand o;
         if (Operand::CanHold(value, &o)) {
           __ and_(result, left, o);
         } else if (Operand::CanHold(~value, &o)) {
@@ skipping 22 matching lines @@
           __ eor(result, left, o);
         } else {
           __ LoadImmediate(IP, value);
           __ eor(result, left, Operand(IP));
         }
         break;
       }
       case Token::kSHR: {
         // sarl operation masks the count to 5 bits.
         const intptr_t kCountLimit = 0x1F;
-
-        if (value == 0) {
-          // TODO(vegorov): should be handled outside.
-          __ MoveRegister(result, left);
-          break;
-        } else if (value < 0) {
-          // TODO(vegorov): should be handled outside.
-          __ b(deopt);
-          break;
-        }
-
-        if (value >= kCountLimit) {
-          __ Asr(result, left, kCountLimit);
-        } else {
-          __ Asr(result, left, value);
-        }
+        __ Asr(result, left, Utils::Minimum(value, kCountLimit));
         break;
       }
 
       default:
         UNREACHABLE();
         break;
     }
     return;
   }
 
@@ skipping 3573 matching lines @@
   compiler->GenerateCall(token_pos(), &label, stub_kind_, locs());
 #if defined(DEBUG)
   __ LoadImmediate(R4, kInvalidObjectPointer);
   __ LoadImmediate(R5, kInvalidObjectPointer);
 #endif
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM