Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(3)

Side by Side Diff: binutils/opcodes/i386-opc.tbl

Issue 5648005: [binutils] allow immediates in naclrest{bp,sp} (Closed) Base URL: ssh://git@gitrw.chromium.org:9222/nacl-toolchain.git@master
Patch Set: Created 10 years ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « binutils/gas/config/tc-i386.c ('k') | no next file » | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // i386 opcode table. 1 // i386 opcode table.
2 // Copyright 2007, 2008, 2009 2 // Copyright 2007, 2008, 2009
3 // Free Software Foundation, Inc. 3 // Free Software Foundation, Inc.
4 // 4 //
5 // This file is part of the GNU opcodes library. 5 // This file is part of the GNU opcodes library.
6 // 6 //
7 // This library is free software; you can redistribute it and/or modify 7 // This library is free software; you can redistribute it and/or modify
8 // it under the terms of the GNU General Public License as published by 8 // it under the terms of the GNU General Public License as published by
9 // the Free Software Foundation; either version 3, or (at your option) 9 // the Free Software Foundation; either version 3, or (at your option)
10 // any later version. 10 // any later version.
(...skipping 204 matching lines...) Expand 10 before | Expand all | Expand 10 after
215 naclcall, 2, 0xff, 0x2, 1, Cpu64, Modrm|DefaultSize|No_bSuf|No_wSuf|No_lSuf|No_s Suf|No_qSuf|No_ldSuf, { Reg32, Reg64 } 215 naclcall, 2, 0xff, 0x2, 1, Cpu64, Modrm|DefaultSize|No_bSuf|No_wSuf|No_lSuf|No_s Suf|No_qSuf|No_ldSuf, { Reg32, Reg64 }
216 nacljmp, 2, 0xff, 0x4, 1, Cpu64, Modrm|DefaultSize|No_bSuf|No_wSuf|No_lSuf|No_sS uf|No_qSuf|No_ldSuf, { Reg32, Reg64 } 216 nacljmp, 2, 0xff, 0x4, 1, Cpu64, Modrm|DefaultSize|No_bSuf|No_wSuf|No_lSuf|No_sS uf|No_qSuf|No_ldSuf, { Reg32, Reg64 }
217 naclasp, 2, 0x01, None, 1, Cpu64, W|Modrm|No_sSuf|No_ldSuf, { Imm8S, Reg64 } 217 naclasp, 2, 0x01, None, 1, Cpu64, W|Modrm|No_sSuf|No_ldSuf, { Imm8S, Reg64 }
218 naclasp, 2, 0x01, None, 1, Cpu64, W|Modrm|No_sSuf|No_ldSuf, { Imm32S, Reg64 } 218 naclasp, 2, 0x01, None, 1, Cpu64, W|Modrm|No_sSuf|No_ldSuf, { Imm32S, Reg64 }
219 naclasp, 2, 0x01, None, 1, Cpu64, W|Modrm|No_sSuf|No_ldSuf, { Unspecified|BaseIn dex|Disp8|Disp32S|Reg32, Reg64 } 219 naclasp, 2, 0x01, None, 1, Cpu64, W|Modrm|No_sSuf|No_ldSuf, { Unspecified|BaseIn dex|Disp8|Disp32S|Reg32, Reg64 }
220 naclssp, 2, 0x01, None, 1, Cpu64, W|Modrm|No_sSuf|No_ldSuf, { Imm8S, Reg64 } 220 naclssp, 2, 0x01, None, 1, Cpu64, W|Modrm|No_sSuf|No_ldSuf, { Imm8S, Reg64 }
221 naclssp, 2, 0x01, None, 1, Cpu64, W|Modrm|No_sSuf|No_ldSuf, { Imm32S, Reg64 } 221 naclssp, 2, 0x01, None, 1, Cpu64, W|Modrm|No_sSuf|No_ldSuf, { Imm32S, Reg64 }
222 naclssp, 2, 0x01, None, 1, Cpu64, W|Modrm|No_sSuf|No_ldSuf, { Unspecified|BaseIn dex|Disp8|Disp32S|Reg32, Reg64 } 222 naclssp, 2, 0x01, None, 1, Cpu64, W|Modrm|No_sSuf|No_ldSuf, { Unspecified|BaseIn dex|Disp8|Disp32S|Reg32, Reg64 }
223 naclspadj, 2, 0x01, None, 1, Cpu64, W|Modrm|No_sSuf|No_ldSuf, { Imm8S, Reg64 } 223 naclspadj, 2, 0x01, None, 1, Cpu64, W|Modrm|No_sSuf|No_ldSuf, { Imm8S, Reg64 }
224 naclspadj, 2, 0x01, None, 1, Cpu64, W|Modrm|No_sSuf|No_ldSuf, { Imm32S, Reg64 } 224 naclspadj, 2, 0x01, None, 1, Cpu64, W|Modrm|No_sSuf|No_ldSuf, { Imm32S, Reg64 }
225 naclrestbp, 2, 0x01, None, 1, Cpu64, W|Modrm|No_sSuf|No_ldSuf, { Imm32S, Reg64 }
225 naclrestbp, 2, 0x01, None, 1, Cpu64, W|Modrm|No_sSuf|No_ldSuf, { Unspecified|Bas eIndex|Disp8|Disp32S|Reg32, Reg64 } 226 naclrestbp, 2, 0x01, None, 1, Cpu64, W|Modrm|No_sSuf|No_ldSuf, { Unspecified|Bas eIndex|Disp8|Disp32S|Reg32, Reg64 }
227 naclrestsp, 2, 0x01, None, 1, Cpu64, W|Modrm|No_sSuf|No_ldSuf, { Imm32S, Reg64 }
226 naclrestsp, 2, 0x01, None, 1, Cpu64, W|Modrm|No_sSuf|No_ldSuf, { Unspecified|Bas eIndex|Disp8|Disp32S|Reg32, Reg64 } 228 naclrestsp, 2, 0x01, None, 1, Cpu64, W|Modrm|No_sSuf|No_ldSuf, { Unspecified|Bas eIndex|Disp8|Disp32S|Reg32, Reg64 }
227 naclrestsp_noflags, 2, 0x8d, None, 1, Cpu64, W|Modrm|No_sSuf|No_ldSuf, { Unspeci fied|BaseIndex|Disp8|Disp32S|Reg32, Reg64 } 229 naclrestsp_noflags, 2, 0x8d, None, 1, Cpu64, W|Modrm|No_sSuf|No_ldSuf, { Unspeci fied|BaseIndex|Disp8|Disp32S|Reg32, Reg64 }
228 230
229 // Native client string operations 231 // Native client string operations
230 cmps, 3, 0xa6, None, 1, Cpu64, W|No_sSuf|No_ldSuf|IsString, { Byte|Word|Dword|Qw ord|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|EsSeg, Byte|Word|Dword|Qwo rd|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg64 } 232 cmps, 3, 0xa6, None, 1, Cpu64, W|No_sSuf|No_ldSuf|IsString, { Byte|Word|Dword|Qw ord|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|EsSeg, Byte|Word|Dword|Qwo rd|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg64 }
231 scmp, 3, 0xa6, None, 1, Cpu64, W|No_sSuf|No_ldSuf|IsString, { Byte|Word|Dword|Qw ord|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|EsSeg, Byte|Word|Dword|Qwo rd|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg64 } 233 scmp, 3, 0xa6, None, 1, Cpu64, W|No_sSuf|No_ldSuf|IsString, { Byte|Word|Dword|Qw ord|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|EsSeg, Byte|Word|Dword|Qwo rd|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg64 }
232 ins, 3, 0x6c, None, 1, Cpu64, W|No_sSuf|No_qSuf|No_ldSuf|IsString, { InOutPortRe g, Byte|Word|Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|EsSeg, Reg6 4 } 234 ins, 3, 0x6c, None, 1, Cpu64, W|No_sSuf|No_qSuf|No_ldSuf|IsString, { InOutPortRe g, Byte|Word|Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|EsSeg, Reg6 4 }
233 outs, 3, 0x6e, None, 1, Cpu64, W|No_sSuf|No_qSuf|No_ldSuf|IsString, { Byte|Word| Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, InOutPortReg, Reg64 } 235 outs, 3, 0x6e, None, 1, Cpu64, W|No_sSuf|No_qSuf|No_ldSuf|IsString, { Byte|Word| Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, InOutPortReg, Reg64 }
234 lods, 3, 0xac, None, 1, Cpu64, W|No_sSuf|No_ldSuf|IsString, { Byte|Word|Dword|Qw ord|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Acc|Byte|Word|Dword|Qword , Reg64 } 236 lods, 3, 0xac, None, 1, Cpu64, W|No_sSuf|No_ldSuf|IsString, { Byte|Word|Dword|Qw ord|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Acc|Byte|Word|Dword|Qword , Reg64 }
235 slod, 3, 0xac, None, 1, Cpu64, W|No_sSuf|No_ldSuf|IsString, { Byte|Word|Dword|Qw ord|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Acc|Byte|Word|Dword|Qword , Reg64 } 237 slod, 3, 0xac, None, 1, Cpu64, W|No_sSuf|No_ldSuf|IsString, { Byte|Word|Dword|Qw ord|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Acc|Byte|Word|Dword|Qword , Reg64 }
(...skipping 2426 matching lines...) Expand 10 before | Expand all | Expand 10 after
2662 xsha256, 0, 0xf30fa6, 0xd0, 2, CpuPadLock, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qS uf|No_ldSuf|IsString|ImmExt, { 0 } 2664 xsha256, 0, 0xf30fa6, 0xd0, 2, CpuPadLock, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qS uf|No_ldSuf|IsString|ImmExt, { 0 }
2663 // Aliases without hyphens. 2665 // Aliases without hyphens.
2664 xstorerng, 0, 0xfa7, 0xc0, 2, CpuPadLock, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSu f|No_ldSuf|IsString|ImmExt, { 0 } 2666 xstorerng, 0, 0xfa7, 0xc0, 2, CpuPadLock, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSu f|No_ldSuf|IsString|ImmExt, { 0 }
2665 xcryptecb, 0, 0xf30fa7, 0xc8, 2, CpuPadLock, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ qSuf|No_ldSuf|IsString|ImmExt, { 0 } 2667 xcryptecb, 0, 0xf30fa7, 0xc8, 2, CpuPadLock, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ qSuf|No_ldSuf|IsString|ImmExt, { 0 }
2666 xcryptcbc, 0, 0xf30fa7, 0xd0, 2, CpuPadLock, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ qSuf|No_ldSuf|IsString|ImmExt, { 0 } 2668 xcryptcbc, 0, 0xf30fa7, 0xd0, 2, CpuPadLock, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ qSuf|No_ldSuf|IsString|ImmExt, { 0 }
2667 xcryptctr, 0, 0xf30fa7, 0xd8, 2, CpuPadLock, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ qSuf|No_ldSuf|IsString|ImmExt, { 0 } 2669 xcryptctr, 0, 0xf30fa7, 0xd8, 2, CpuPadLock, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ qSuf|No_ldSuf|IsString|ImmExt, { 0 }
2668 xcryptcfb, 0, 0xf30fa7, 0xe0, 2, CpuPadLock, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ qSuf|No_ldSuf|IsString|ImmExt, { 0 } 2670 xcryptcfb, 0, 0xf30fa7, 0xe0, 2, CpuPadLock, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ qSuf|No_ldSuf|IsString|ImmExt, { 0 }
2669 xcryptofb, 0, 0xf30fa7, 0xe8, 2, CpuPadLock, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ qSuf|No_ldSuf|IsString|ImmExt, { 0 } 2671 xcryptofb, 0, 0xf30fa7, 0xe8, 2, CpuPadLock, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ qSuf|No_ldSuf|IsString|ImmExt, { 0 }
2670 // Alias for xstore-rng. 2672 // Alias for xstore-rng.
2671 xstore, 0, 0xfa7, 0xc0, 2, CpuPadLock, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|N o_ldSuf|IsString|ImmExt, { 0 } 2673 xstore, 0, 0xfa7, 0xc0, 2, CpuPadLock, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|N o_ldSuf|IsString|ImmExt, { 0 }
OLDNEW
« no previous file with comments | « binutils/gas/config/tc-i386.c ('k') | no next file » | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698