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Side by Side Diff: tests_lit/reader_tests/select.ll

Issue 561823002: Fix symbol table handling in functions. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix issues in patch set 2 raised by Jim. Created 6 years, 3 months ago
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1 ; Tests if we can read select instructions. 1 ; Tests if we can read select instructions.
2 2
3 ; RUN: llvm-as < %s | pnacl-freeze \ 3 ; RUN: llvm-as < %s | pnacl-freeze -allow-local-symbol-tables \
4 ; RUN: | %llvm2ice -notranslate -verbose=inst -build-on-read \ 4 ; RUN: | %llvm2ice -notranslate -verbose=inst -build-on-read \
5 ; RUN: -allow-pnacl-reader-error-recovery \ 5 ; RUN: -allow-pnacl-reader-error-recovery \
6 ; RUN: -allow-local-symbol-tables \
6 ; RUN: | FileCheck %s 7 ; RUN: | FileCheck %s
7 8
8 define void @Seli1(i32 %p) { 9 define void @Seli1(i32 %p) {
10 entry:
9 %vc = trunc i32 %p to i1 11 %vc = trunc i32 %p to i1
10 %vt = trunc i32 %p to i1 12 %vt = trunc i32 %p to i1
11 %ve = trunc i32 %p to i1 13 %ve = trunc i32 %p to i1
12 %r = select i1 %vc, i1 %vt, i1 %ve 14 %r = select i1 %vc, i1 %vt, i1 %ve
13 ret void 15 ret void
14 } 16 }
15 17
16 ; CHECK: define void @Seli1(i32 %__0) { 18 ; CHECK: define void @Seli1(i32 %p) {
17 ; CHECK-NEXT: __0: 19 ; CHECK-NEXT: entry:
18 ; CHECK-NEXT: %__1 = trunc i32 %__0 to i1 20 ; CHECK-NEXT: %vc = trunc i32 %p to i1
19 ; CHECK-NEXT: %__2 = trunc i32 %__0 to i1 21 ; CHECK-NEXT: %vt = trunc i32 %p to i1
20 ; CHECK-NEXT: %__3 = trunc i32 %__0 to i1 22 ; CHECK-NEXT: %ve = trunc i32 %p to i1
21 ; CHECK-NEXT: %__4 = select i1 %__1, i1 %__2, i1 %__3 23 ; CHECK-NEXT: %r = select i1 %vc, i1 %vt, i1 %ve
22 ; CHECK-NEXT: ret void 24 ; CHECK-NEXT: ret void
23 ; CHECK-NEXT: } 25 ; CHECK-NEXT: }
24 26
25 define void @Seli8(i32 %p) { 27 define void @Seli8(i32 %p) {
28 entry:
26 %vc = trunc i32 %p to i1 29 %vc = trunc i32 %p to i1
27 %vt = trunc i32 %p to i8 30 %vt = trunc i32 %p to i8
28 %ve = trunc i32 %p to i8 31 %ve = trunc i32 %p to i8
29 %r = select i1 %vc, i8 %vt, i8 %ve 32 %r = select i1 %vc, i8 %vt, i8 %ve
30 ret void 33 ret void
31 } 34 }
32 35
33 ; CHECK-NEXT: define void @Seli8(i32 %__0) { 36 ; CHECK-NEXT: define void @Seli8(i32 %p) {
34 ; CHECK-NEXT: __0: 37 ; CHECK-NEXT: entry:
35 ; CHECK-NEXT: %__1 = trunc i32 %__0 to i1 38 ; CHECK-NEXT: %vc = trunc i32 %p to i1
36 ; CHECK-NEXT: %__2 = trunc i32 %__0 to i8 39 ; CHECK-NEXT: %vt = trunc i32 %p to i8
37 ; CHECK-NEXT: %__3 = trunc i32 %__0 to i8 40 ; CHECK-NEXT: %ve = trunc i32 %p to i8
38 ; CHECK-NEXT: %__4 = select i1 %__1, i8 %__2, i8 %__3 41 ; CHECK-NEXT: %r = select i1 %vc, i8 %vt, i8 %ve
39 ; CHECK-NEXT: ret void 42 ; CHECK-NEXT: ret void
40 ; CHECK-NEXT: } 43 ; CHECK-NEXT: }
41 44
42 define void @Seli16(i32 %p) { 45 define void @Seli16(i32 %p) {
46 entry:
43 %vc = trunc i32 %p to i1 47 %vc = trunc i32 %p to i1
44 %vt = trunc i32 %p to i16 48 %vt = trunc i32 %p to i16
45 %ve = trunc i32 %p to i16 49 %ve = trunc i32 %p to i16
46 %r = select i1 %vc, i16 %vt, i16 %ve 50 %r = select i1 %vc, i16 %vt, i16 %ve
47 ret void 51 ret void
48 } 52 }
49 53
50 ; CHECK-NEXT: define void @Seli16(i32 %__0) { 54 ; CHECK-NEXT: define void @Seli16(i32 %p) {
51 ; CHECK-NEXT: __0: 55 ; CHECK-NEXT: entry:
52 ; CHECK-NEXT: %__1 = trunc i32 %__0 to i1 56 ; CHECK-NEXT: %vc = trunc i32 %p to i1
53 ; CHECK-NEXT: %__2 = trunc i32 %__0 to i16 57 ; CHECK-NEXT: %vt = trunc i32 %p to i16
54 ; CHECK-NEXT: %__3 = trunc i32 %__0 to i16 58 ; CHECK-NEXT: %ve = trunc i32 %p to i16
55 ; CHECK-NEXT: %__4 = select i1 %__1, i16 %__2, i16 %__3 59 ; CHECK-NEXT: %r = select i1 %vc, i16 %vt, i16 %ve
56 ; CHECK-NEXT: ret void 60 ; CHECK-NEXT: ret void
57 ; CHECK-NEXT: } 61 ; CHECK-NEXT: }
58 62
59 define i32 @Seli32(i32 %pc, i32 %pt, i32 %pe) { 63 define i32 @Seli32(i32 %pc, i32 %pt, i32 %pe) {
64 entry:
60 %vc = trunc i32 %pc to i1 65 %vc = trunc i32 %pc to i1
61 %r = select i1 %vc, i32 %pt, i32 %pe 66 %r = select i1 %vc, i32 %pt, i32 %pe
62 ret i32 %r 67 ret i32 %r
63 } 68 }
64 69
65 ; CHECK-NEXT: define i32 @Seli32(i32 %__0, i32 %__1, i32 %__2) { 70 ; CHECK-NEXT: define i32 @Seli32(i32 %pc, i32 %pt, i32 %pe) {
66 ; CHECK-NEXT: __0: 71 ; CHECK-NEXT: entry:
67 ; CHECK-NEXT: %__3 = trunc i32 %__0 to i1 72 ; CHECK-NEXT: %vc = trunc i32 %pc to i1
68 ; CHECK-NEXT: %__4 = select i1 %__3, i32 %__1, i32 %__2 73 ; CHECK-NEXT: %r = select i1 %vc, i32 %pt, i32 %pe
69 ; CHECK-NEXT: ret i32 %__4 74 ; CHECK-NEXT: ret i32 %r
70 ; CHECK-NEXT: } 75 ; CHECK-NEXT: }
71 76
72 define i64 @Seli64(i64 %pc, i64 %pt, i64 %pe) { 77 define i64 @Seli64(i64 %pc, i64 %pt, i64 %pe) {
78 entry:
73 %vc = trunc i64 %pc to i1 79 %vc = trunc i64 %pc to i1
74 %r = select i1 %vc, i64 %pt, i64 %pe 80 %r = select i1 %vc, i64 %pt, i64 %pe
75 ret i64 %r 81 ret i64 %r
76 } 82 }
77 83
78 ; CHECK-NEXT: define i64 @Seli64(i64 %__0, i64 %__1, i64 %__2) { 84 ; CHECK-NEXT: define i64 @Seli64(i64 %pc, i64 %pt, i64 %pe) {
79 ; CHECK-NEXT: __0: 85 ; CHECK-NEXT: entry:
80 ; CHECK-NEXT: %__3 = trunc i64 %__0 to i1 86 ; CHECK-NEXT: %vc = trunc i64 %pc to i1
81 ; CHECK-NEXT: %__4 = select i1 %__3, i64 %__1, i64 %__2 87 ; CHECK-NEXT: %r = select i1 %vc, i64 %pt, i64 %pe
82 ; CHECK-NEXT: ret i64 %__4 88 ; CHECK-NEXT: ret i64 %r
83 ; CHECK-NEXT: } 89 ; CHECK-NEXT: }
84 90
85 define float @SelFloat(i32 %pc, float %pt, float %pe) { 91 define float @SelFloat(i32 %pc, float %pt, float %pe) {
92 entry:
86 %vc = trunc i32 %pc to i1 93 %vc = trunc i32 %pc to i1
87 %r = select i1 %vc, float %pt, float %pe 94 %r = select i1 %vc, float %pt, float %pe
88 ret float %r 95 ret float %r
89 } 96 }
90 97
91 ; CHECK-NEXT: define float @SelFloat(i32 %__0, float %__1, float %__2) { 98 ; CHECK-NEXT: define float @SelFloat(i32 %pc, float %pt, float %pe) {
92 ; CHECK-NEXT: __0: 99 ; CHECK-NEXT: entry:
93 ; CHECK-NEXT: %__3 = trunc i32 %__0 to i1 100 ; CHECK-NEXT: %vc = trunc i32 %pc to i1
94 ; CHECK-NEXT: %__4 = select i1 %__3, float %__1, float %__2 101 ; CHECK-NEXT: %r = select i1 %vc, float %pt, float %pe
95 ; CHECK-NEXT: ret float %__4 102 ; CHECK-NEXT: ret float %r
96 ; CHECK-NEXT: } 103 ; CHECK-NEXT: }
97 104
98 define double @SelDouble(i32 %pc, double %pt, double %pe) { 105 define double @SelDouble(i32 %pc, double %pt, double %pe) {
106 entry:
99 %vc = trunc i32 %pc to i1 107 %vc = trunc i32 %pc to i1
100 %r = select i1 %vc, double %pt, double %pe 108 %r = select i1 %vc, double %pt, double %pe
101 ret double %r 109 ret double %r
102 } 110 }
103 111
104 ; CHECK-NEXT: define double @SelDouble(i32 %__0, double %__1, double %__2) { 112 ; CHECK-NEXT: define double @SelDouble(i32 %pc, double %pt, double %pe) {
105 ; CHECK-NEXT: __0: 113 ; CHECK-NEXT: entry:
106 ; CHECK-NEXT: %__3 = trunc i32 %__0 to i1 114 ; CHECK-NEXT: %vc = trunc i32 %pc to i1
107 ; CHECK-NEXT: %__4 = select i1 %__3, double %__1, double %__2 115 ; CHECK-NEXT: %r = select i1 %vc, double %pt, double %pe
108 ; CHECK-NEXT: ret double %__4 116 ; CHECK-NEXT: ret double %r
109 ; CHECK-NEXT: } 117 ; CHECK-NEXT: }
110 118
111 define <16 x i1> @SelV16x1(i32 %pc, <16 x i1> %pt, <16 x i1> %pe) { 119 define <16 x i1> @SelV16x1(i32 %pc, <16 x i1> %pt, <16 x i1> %pe) {
120 entry:
112 %vc = trunc i32 %pc to i1 121 %vc = trunc i32 %pc to i1
113 %r = select i1 %vc, <16 x i1> %pt, <16 x i1> %pe 122 %r = select i1 %vc, <16 x i1> %pt, <16 x i1> %pe
114 ret <16 x i1> %r 123 ret <16 x i1> %r
115 } 124 }
116 125
117 ; CHECK-NEXT: define <16 x i1> @SelV16x1(i32 %__0, <16 x i1> %__1, <16 x i1> %__ 2) { 126 ; CHECK-NEXT: define <16 x i1> @SelV16x1(i32 %pc, <16 x i1> %pt, <16 x i1> %pe) {
118 ; CHECK-NEXT: __0: 127 ; CHECK-NEXT: entry:
119 ; CHECK-NEXT: %__3 = trunc i32 %__0 to i1 128 ; CHECK-NEXT: %vc = trunc i32 %pc to i1
120 ; CHECK-NEXT: %__4 = select i1 %__3, <16 x i1> %__1, <16 x i1> %__2 129 ; CHECK-NEXT: %r = select i1 %vc, <16 x i1> %pt, <16 x i1> %pe
121 ; CHECK-NEXT: ret <16 x i1> %__4 130 ; CHECK-NEXT: ret <16 x i1> %r
122 ; CHECK-NEXT: } 131 ; CHECK-NEXT: }
123 132
124 define <8 x i1> @SelV8x1(i32 %pc, <8 x i1> %pt, <8 x i1> %pe) { 133 define <8 x i1> @SelV8x1(i32 %pc, <8 x i1> %pt, <8 x i1> %pe) {
134 entry:
125 %vc = trunc i32 %pc to i1 135 %vc = trunc i32 %pc to i1
126 %r = select i1 %vc, <8 x i1> %pt, <8 x i1> %pe 136 %r = select i1 %vc, <8 x i1> %pt, <8 x i1> %pe
127 ret <8 x i1> %r 137 ret <8 x i1> %r
128 } 138 }
129 139
130 ; CHECK-NEXT: define <8 x i1> @SelV8x1(i32 %__0, <8 x i1> %__1, <8 x i1> %__2) { 140 ; CHECK-NEXT: define <8 x i1> @SelV8x1(i32 %pc, <8 x i1> %pt, <8 x i1> %pe) {
131 ; CHECK-NEXT: __0: 141 ; CHECK-NEXT: entry:
132 ; CHECK-NEXT: %__3 = trunc i32 %__0 to i1 142 ; CHECK-NEXT: %vc = trunc i32 %pc to i1
133 ; CHECK-NEXT: %__4 = select i1 %__3, <8 x i1> %__1, <8 x i1> %__2 143 ; CHECK-NEXT: %r = select i1 %vc, <8 x i1> %pt, <8 x i1> %pe
134 ; CHECK-NEXT: ret <8 x i1> %__4 144 ; CHECK-NEXT: ret <8 x i1> %r
135 ; CHECK-NEXT: } 145 ; CHECK-NEXT: }
136 146
137 define <4 x i1> @SelV4x1(i32 %pc, <4 x i1> %pt, <4 x i1> %pe) { 147 define <4 x i1> @SelV4x1(i32 %pc, <4 x i1> %pt, <4 x i1> %pe) {
148 entry:
138 %vc = trunc i32 %pc to i1 149 %vc = trunc i32 %pc to i1
139 %r = select i1 %vc, <4 x i1> %pt, <4 x i1> %pe 150 %r = select i1 %vc, <4 x i1> %pt, <4 x i1> %pe
140 ret <4 x i1> %r 151 ret <4 x i1> %r
141 } 152 }
142 153
143 ; CHECK-NEXT: define <4 x i1> @SelV4x1(i32 %__0, <4 x i1> %__1, <4 x i1> %__2) { 154 ; CHECK-NEXT: define <4 x i1> @SelV4x1(i32 %pc, <4 x i1> %pt, <4 x i1> %pe) {
144 ; CHECK-NEXT: __0: 155 ; CHECK-NEXT: entry:
145 ; CHECK-NEXT: %__3 = trunc i32 %__0 to i1 156 ; CHECK-NEXT: %vc = trunc i32 %pc to i1
146 ; CHECK-NEXT: %__4 = select i1 %__3, <4 x i1> %__1, <4 x i1> %__2 157 ; CHECK-NEXT: %r = select i1 %vc, <4 x i1> %pt, <4 x i1> %pe
147 ; CHECK-NEXT: ret <4 x i1> %__4 158 ; CHECK-NEXT: ret <4 x i1> %r
148 ; CHECK-NEXT: } 159 ; CHECK-NEXT: }
149 160
150 define <16 x i8> @SelV16x8(i32 %pc, <16 x i8> %pt, <16 x i8> %pe) { 161 define <16 x i8> @SelV16x8(i32 %pc, <16 x i8> %pt, <16 x i8> %pe) {
162 entry:
151 %vc = trunc i32 %pc to i1 163 %vc = trunc i32 %pc to i1
152 %r = select i1 %vc, <16 x i8> %pt, <16 x i8> %pe 164 %r = select i1 %vc, <16 x i8> %pt, <16 x i8> %pe
153 ret <16 x i8> %r 165 ret <16 x i8> %r
154 } 166 }
155 167
156 ; CHECK-NEXT: define <16 x i8> @SelV16x8(i32 %__0, <16 x i8> %__1, <16 x i8> %__ 2) { 168 ; CHECK-NEXT: define <16 x i8> @SelV16x8(i32 %pc, <16 x i8> %pt, <16 x i8> %pe) {
157 ; CHECK-NEXT: __0: 169 ; CHECK-NEXT: entry:
158 ; CHECK-NEXT: %__3 = trunc i32 %__0 to i1 170 ; CHECK-NEXT: %vc = trunc i32 %pc to i1
159 ; CHECK-NEXT: %__4 = select i1 %__3, <16 x i8> %__1, <16 x i8> %__2 171 ; CHECK-NEXT: %r = select i1 %vc, <16 x i8> %pt, <16 x i8> %pe
160 ; CHECK-NEXT: ret <16 x i8> %__4 172 ; CHECK-NEXT: ret <16 x i8> %r
161 ; CHECK-NEXT: } 173 ; CHECK-NEXT: }
162 174
163 define <8 x i16> @SelV8x16(i32 %pc, <8 x i16> %pt, <8 x i16> %pe) { 175 define <8 x i16> @SelV8x16(i32 %pc, <8 x i16> %pt, <8 x i16> %pe) {
176 entry:
164 %vc = trunc i32 %pc to i1 177 %vc = trunc i32 %pc to i1
165 %r = select i1 %vc, <8 x i16> %pt, <8 x i16> %pe 178 %r = select i1 %vc, <8 x i16> %pt, <8 x i16> %pe
166 ret <8 x i16> %r 179 ret <8 x i16> %r
167 } 180 }
168 181
169 ; CHECK-NEXT: define <8 x i16> @SelV8x16(i32 %__0, <8 x i16> %__1, <8 x i16> %__ 2) { 182 ; CHECK-NEXT: define <8 x i16> @SelV8x16(i32 %pc, <8 x i16> %pt, <8 x i16> %pe) {
170 ; CHECK-NEXT: __0: 183 ; CHECK-NEXT: entry:
171 ; CHECK-NEXT: %__3 = trunc i32 %__0 to i1 184 ; CHECK-NEXT: %vc = trunc i32 %pc to i1
172 ; CHECK-NEXT: %__4 = select i1 %__3, <8 x i16> %__1, <8 x i16> %__2 185 ; CHECK-NEXT: %r = select i1 %vc, <8 x i16> %pt, <8 x i16> %pe
173 ; CHECK-NEXT: ret <8 x i16> %__4 186 ; CHECK-NEXT: ret <8 x i16> %r
174 ; CHECK-NEXT: } 187 ; CHECK-NEXT: }
175 188
176 define <4 x i32> @SelV4x32(i32 %pc, <4 x i32> %pt, <4 x i32> %pe) { 189 define <4 x i32> @SelV4x32(i32 %pc, <4 x i32> %pt, <4 x i32> %pe) {
190 entry:
177 %vc = trunc i32 %pc to i1 191 %vc = trunc i32 %pc to i1
178 %r = select i1 %vc, <4 x i32> %pt, <4 x i32> %pe 192 %r = select i1 %vc, <4 x i32> %pt, <4 x i32> %pe
179 ret <4 x i32> %r 193 ret <4 x i32> %r
180 } 194 }
181 195
182 ; CHECK-NEXT: define <4 x i32> @SelV4x32(i32 %__0, <4 x i32> %__1, <4 x i32> %__ 2) { 196 ; CHECK-NEXT: define <4 x i32> @SelV4x32(i32 %pc, <4 x i32> %pt, <4 x i32> %pe) {
183 ; CHECK-NEXT: __0: 197 ; CHECK-NEXT: entry:
184 ; CHECK-NEXT: %__3 = trunc i32 %__0 to i1 198 ; CHECK-NEXT: %vc = trunc i32 %pc to i1
185 ; CHECK-NEXT: %__4 = select i1 %__3, <4 x i32> %__1, <4 x i32> %__2 199 ; CHECK-NEXT: %r = select i1 %vc, <4 x i32> %pt, <4 x i32> %pe
186 ; CHECK-NEXT: ret <4 x i32> %__4 200 ; CHECK-NEXT: ret <4 x i32> %r
187 ; CHECK-NEXT: } 201 ; CHECK-NEXT: }
188 202
189 define <4 x float> @SelV4xfloat(i32 %pc, <4 x float> %pt, <4 x float> %pe) { 203 define <4 x float> @SelV4xfloat(i32 %pc, <4 x float> %pt, <4 x float> %pe) {
204 entry:
190 %vc = trunc i32 %pc to i1 205 %vc = trunc i32 %pc to i1
191 %r = select i1 %vc, <4 x float> %pt, <4 x float> %pe 206 %r = select i1 %vc, <4 x float> %pt, <4 x float> %pe
192 ret <4 x float> %r 207 ret <4 x float> %r
193 } 208 }
194 209
195 ; CHECK-NEXT: define <4 x float> @SelV4xfloat(i32 %__0, <4 x float> %__1, <4 x f loat> %__2) { 210 ; CHECK-NEXT: define <4 x float> @SelV4xfloat(i32 %pc, <4 x float> %pt, <4 x flo at> %pe) {
196 ; CHECK-NEXT: __0: 211 ; CHECK-NEXT: entry:
197 ; CHECK-NEXT: %__3 = trunc i32 %__0 to i1 212 ; CHECK-NEXT: %vc = trunc i32 %pc to i1
198 ; CHECK-NEXT: %__4 = select i1 %__3, <4 x float> %__1, <4 x float> %__2 213 ; CHECK-NEXT: %r = select i1 %vc, <4 x float> %pt, <4 x float> %pe
199 ; CHECK-NEXT: ret <4 x float> %__4 214 ; CHECK-NEXT: ret <4 x float> %r
200 ; CHECK-NEXT: } 215 ; CHECK-NEXT: }
201 216
202 define <16 x i1> @SelV16x1Vcond(<16 x i1> %pc, <16 x i1> %pt, <16 x i1> %pe) { 217 define <16 x i1> @SelV16x1Vcond(<16 x i1> %pc, <16 x i1> %pt, <16 x i1> %pe) {
218 entry:
203 %r = select <16 x i1> %pc, <16 x i1> %pt, <16 x i1> %pe 219 %r = select <16 x i1> %pc, <16 x i1> %pt, <16 x i1> %pe
204 ret <16 x i1> %r 220 ret <16 x i1> %r
205 } 221 }
206 222
207 ; CHECK-NEXT: define <16 x i1> @SelV16x1Vcond(<16 x i1> %__0, <16 x i1> %__1, <1 6 x i1> %__2) { 223 ; CHECK-NEXT: define <16 x i1> @SelV16x1Vcond(<16 x i1> %pc, <16 x i1> %pt, <16 x i1> %pe) {
208 ; CHECK-NEXT: __0: 224 ; CHECK-NEXT: entry:
209 ; CHECK-NEXT: %__3 = select <16 x i1> %__0, <16 x i1> %__1, <16 x i1> %__2 225 ; CHECK-NEXT: %r = select <16 x i1> %pc, <16 x i1> %pt, <16 x i1> %pe
210 ; CHECK-NEXT: ret <16 x i1> %__3 226 ; CHECK-NEXT: ret <16 x i1> %r
211 ; CHECK-NEXT: } 227 ; CHECK-NEXT: }
212 228
213 define <8 x i1> @SelV8x1Vcond(<8 x i1> %pc, <8 x i1> %pt, <8 x i1> %pe) { 229 define <8 x i1> @SelV8x1Vcond(<8 x i1> %pc, <8 x i1> %pt, <8 x i1> %pe) {
230 entry:
214 %r = select <8 x i1> %pc, <8 x i1> %pt, <8 x i1> %pe 231 %r = select <8 x i1> %pc, <8 x i1> %pt, <8 x i1> %pe
215 ret <8 x i1> %r 232 ret <8 x i1> %r
216 } 233 }
217 234
218 ; CHECK-NEXT: define <8 x i1> @SelV8x1Vcond(<8 x i1> %__0, <8 x i1> %__1, <8 x i 1> %__2) { 235 ; CHECK-NEXT: define <8 x i1> @SelV8x1Vcond(<8 x i1> %pc, <8 x i1> %pt, <8 x i1> %pe) {
219 ; CHECK-NEXT: __0: 236 ; CHECK-NEXT: entry:
220 ; CHECK-NEXT: %__3 = select <8 x i1> %__0, <8 x i1> %__1, <8 x i1> %__2 237 ; CHECK-NEXT: %r = select <8 x i1> %pc, <8 x i1> %pt, <8 x i1> %pe
221 ; CHECK-NEXT: ret <8 x i1> %__3 238 ; CHECK-NEXT: ret <8 x i1> %r
222 ; CHECK-NEXT: } 239 ; CHECK-NEXT: }
223 240
224 define <4 x i1> @SelV4x1Vcond(<4 x i1> %pc, <4 x i1> %pt, <4 x i1> %pe) { 241 define <4 x i1> @SelV4x1Vcond(<4 x i1> %pc, <4 x i1> %pt, <4 x i1> %pe) {
242 entry:
225 %r = select <4 x i1> %pc, <4 x i1> %pt, <4 x i1> %pe 243 %r = select <4 x i1> %pc, <4 x i1> %pt, <4 x i1> %pe
226 ret <4 x i1> %r 244 ret <4 x i1> %r
227 } 245 }
228 246
229 ; CHECK-NEXT: define <4 x i1> @SelV4x1Vcond(<4 x i1> %__0, <4 x i1> %__1, <4 x i 1> %__2) { 247 ; CHECK-NEXT: define <4 x i1> @SelV4x1Vcond(<4 x i1> %pc, <4 x i1> %pt, <4 x i1> %pe) {
230 ; CHECK-NEXT: __0: 248 ; CHECK-NEXT: entry:
231 ; CHECK-NEXT: %__3 = select <4 x i1> %__0, <4 x i1> %__1, <4 x i1> %__2 249 ; CHECK-NEXT: %r = select <4 x i1> %pc, <4 x i1> %pt, <4 x i1> %pe
232 ; CHECK-NEXT: ret <4 x i1> %__3 250 ; CHECK-NEXT: ret <4 x i1> %r
233 ; CHECK-NEXT: } 251 ; CHECK-NEXT: }
234 252
235 define <16 x i8> @SelV16x8Vcond(<16 x i1> %pc, <16 x i8> %pt, <16 x i8> %pe) { 253 define <16 x i8> @SelV16x8Vcond(<16 x i1> %pc, <16 x i8> %pt, <16 x i8> %pe) {
254 entry:
236 %r = select <16 x i1> %pc, <16 x i8> %pt, <16 x i8> %pe 255 %r = select <16 x i1> %pc, <16 x i8> %pt, <16 x i8> %pe
237 ret <16 x i8> %r 256 ret <16 x i8> %r
238 } 257 }
239 258
240 ; CHECK-NEXT: define <16 x i8> @SelV16x8Vcond(<16 x i1> %__0, <16 x i8> %__1, <1 6 x i8> %__2) { 259 ; CHECK-NEXT: define <16 x i8> @SelV16x8Vcond(<16 x i1> %pc, <16 x i8> %pt, <16 x i8> %pe) {
241 ; CHECK-NEXT: __0: 260 ; CHECK-NEXT: entry:
242 ; CHECK-NEXT: %__3 = select <16 x i1> %__0, <16 x i8> %__1, <16 x i8> %__2 261 ; CHECK-NEXT: %r = select <16 x i1> %pc, <16 x i8> %pt, <16 x i8> %pe
243 ; CHECK-NEXT: ret <16 x i8> %__3 262 ; CHECK-NEXT: ret <16 x i8> %r
244 ; CHECK-NEXT: } 263 ; CHECK-NEXT: }
245 264
246 define <8 x i16> @SelV8x16Vcond(<8 x i1> %pc, <8 x i16> %pt, <8 x i16> %pe) { 265 define <8 x i16> @SelV8x16Vcond(<8 x i1> %pc, <8 x i16> %pt, <8 x i16> %pe) {
266 entry:
247 %r = select <8 x i1> %pc, <8 x i16> %pt, <8 x i16> %pe 267 %r = select <8 x i1> %pc, <8 x i16> %pt, <8 x i16> %pe
248 ret <8 x i16> %r 268 ret <8 x i16> %r
249 } 269 }
250 270
251 ; CHECK-NEXT: define <8 x i16> @SelV8x16Vcond(<8 x i1> %__0, <8 x i16> %__1, <8 x i16> %__2) { 271 ; CHECK-NEXT: define <8 x i16> @SelV8x16Vcond(<8 x i1> %pc, <8 x i16> %pt, <8 x i16> %pe) {
252 ; CHECK-NEXT: __0: 272 ; CHECK-NEXT: entry:
253 ; CHECK-NEXT: %__3 = select <8 x i1> %__0, <8 x i16> %__1, <8 x i16> %__2 273 ; CHECK-NEXT: %r = select <8 x i1> %pc, <8 x i16> %pt, <8 x i16> %pe
254 ; CHECK-NEXT: ret <8 x i16> %__3 274 ; CHECK-NEXT: ret <8 x i16> %r
255 ; CHECK-NEXT: } 275 ; CHECK-NEXT: }
256 276
257 define <4 x i32> @SelV4x32Vcond(<4 x i1> %pc, <4 x i32> %pt, <4 x i32> %pe) { 277 define <4 x i32> @SelV4x32Vcond(<4 x i1> %pc, <4 x i32> %pt, <4 x i32> %pe) {
278 entry:
258 %r = select <4 x i1> %pc, <4 x i32> %pt, <4 x i32> %pe 279 %r = select <4 x i1> %pc, <4 x i32> %pt, <4 x i32> %pe
259 ret <4 x i32> %r 280 ret <4 x i32> %r
260 } 281 }
261 282
262 ; CHECK-NEXT: define <4 x i32> @SelV4x32Vcond(<4 x i1> %__0, <4 x i32> %__1, <4 x i32> %__2) { 283 ; CHECK-NEXT: define <4 x i32> @SelV4x32Vcond(<4 x i1> %pc, <4 x i32> %pt, <4 x i32> %pe) {
263 ; CHECK-NEXT: __0: 284 ; CHECK-NEXT: entry:
264 ; CHECK-NEXT: %__3 = select <4 x i1> %__0, <4 x i32> %__1, <4 x i32> %__2 285 ; CHECK-NEXT: %r = select <4 x i1> %pc, <4 x i32> %pt, <4 x i32> %pe
265 ; CHECK-NEXT: ret <4 x i32> %__3 286 ; CHECK-NEXT: ret <4 x i32> %r
266 ; CHECK-NEXT: } 287 ; CHECK-NEXT: }
267 288
268 define <4 x float> @SelV4xfloatVcond(<4 x i1> %pc, <4 x float> %pt, <4 x float> %pe) { 289 define <4 x float> @SelV4xfloatVcond(<4 x i1> %pc, <4 x float> %pt, <4 x float> %pe) {
290 entry:
269 %r = select <4 x i1> %pc, <4 x float> %pt, <4 x float> %pe 291 %r = select <4 x i1> %pc, <4 x float> %pt, <4 x float> %pe
270 ret <4 x float> %r 292 ret <4 x float> %r
271 } 293 }
272 294
273 ; CHECK-NEXT: define <4 x float> @SelV4xfloatVcond(<4 x i1> %__0, <4 x float> %_ _1, <4 x float> %__2) { 295 ; CHECK-NEXT: define <4 x float> @SelV4xfloatVcond(<4 x i1> %pc, <4 x float> %pt , <4 x float> %pe) {
274 ; CHECK-NEXT: __0: 296 ; CHECK-NEXT: entry:
275 ; CHECK-NEXT: %__3 = select <4 x i1> %__0, <4 x float> %__1, <4 x float> %__2 297 ; CHECK-NEXT: %r = select <4 x i1> %pc, <4 x float> %pt, <4 x float> %pe
276 ; CHECK-NEXT: ret <4 x float> %__3 298 ; CHECK-NEXT: ret <4 x float> %r
277 ; CHECK-NEXT: } 299 ; CHECK-NEXT: }
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