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| 1 //===- subzero/src/IceInstX8632.h - Low-level x86 instructions --*- C++ -*-===// | 1 //===- subzero/src/IceInstX8632.h - Low-level x86 instructions --*- C++ -*-===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 // | 9 // |
| 10 // This file declares the InstX8632 and OperandX8632 classes and | 10 // This file declares the InstX8632 and OperandX8632 classes and |
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| 667 typedef InstX8632Ternop<InstX8632::Insertps> InstX8632Insertps; | 667 typedef InstX8632Ternop<InstX8632::Insertps> InstX8632Insertps; |
| 668 typedef InstX8632Ternop<InstX8632::Pinsr> InstX8632Pinsr; | 668 typedef InstX8632Ternop<InstX8632::Pinsr> InstX8632Pinsr; |
| 669 typedef InstX8632Ternop<InstX8632::Shufps> InstX8632Shufps; | 669 typedef InstX8632Ternop<InstX8632::Shufps> InstX8632Shufps; |
| 670 typedef InstX8632Ternop<InstX8632::Blendvps> InstX8632Blendvps; | 670 typedef InstX8632Ternop<InstX8632::Blendvps> InstX8632Blendvps; |
| 671 typedef InstX8632Ternop<InstX8632::Pblendvb> InstX8632Pblendvb; | 671 typedef InstX8632Ternop<InstX8632::Pblendvb> InstX8632Pblendvb; |
| 672 typedef InstX8632ThreeAddressop<InstX8632::Pextr> InstX8632Pextr; | 672 typedef InstX8632ThreeAddressop<InstX8632::Pextr> InstX8632Pextr; |
| 673 typedef InstX8632ThreeAddressop<InstX8632::Pshufd> InstX8632Pshufd; | 673 typedef InstX8632ThreeAddressop<InstX8632::Pshufd> InstX8632Pshufd; |
| 674 | 674 |
| 675 // Base class for a lockable x86-32 instruction (emits a locked prefix). | 675 // Base class for a lockable x86-32 instruction (emits a locked prefix). |
| 676 class InstX8632Lockable : public InstX8632 { | 676 class InstX8632Lockable : public InstX8632 { |
| 677 public: | |
| 678 virtual void emit(const Cfg *Func) const = 0; | |
| 679 virtual void dump(const Cfg *Func) const; | |
| 680 | |
| 681 protected: | 677 protected: |
| 682 bool Locked; | 678 bool Locked; |
| 683 | 679 |
| 684 InstX8632Lockable(Cfg *Func, InstKindX8632 Kind, SizeT Maxsrcs, | 680 InstX8632Lockable(Cfg *Func, InstKindX8632 Kind, SizeT Maxsrcs, |
| 685 Variable *Dest, bool Locked) | 681 Variable *Dest, bool Locked) |
| 686 : InstX8632(Func, Kind, Maxsrcs, Dest), Locked(Locked) { | 682 : InstX8632(Func, Kind, Maxsrcs, Dest), Locked(Locked) { |
| 687 // Assume that such instructions are used for Atomics and be careful | 683 // Assume that such instructions are used for Atomics and be careful |
| 688 // with optimizations. | 684 // with optimizations. |
| 689 HasSideEffects = Locked; | 685 HasSideEffects = Locked; |
| 690 } | 686 } |
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| 1244 template <> void InstX8632Pmuludq::emit(const Cfg *Func) const; | 1240 template <> void InstX8632Pmuludq::emit(const Cfg *Func) const; |
| 1245 template <> void InstX8632Psll::emit(const Cfg *Func) const; | 1241 template <> void InstX8632Psll::emit(const Cfg *Func) const; |
| 1246 template <> void InstX8632Psra::emit(const Cfg *Func) const; | 1242 template <> void InstX8632Psra::emit(const Cfg *Func) const; |
| 1247 template <> void InstX8632Psub::emit(const Cfg *Func) const; | 1243 template <> void InstX8632Psub::emit(const Cfg *Func) const; |
| 1248 template <> void InstX8632Sqrtss::emit(const Cfg *Func) const; | 1244 template <> void InstX8632Sqrtss::emit(const Cfg *Func) const; |
| 1249 template <> void InstX8632Subss::emit(const Cfg *Func) const; | 1245 template <> void InstX8632Subss::emit(const Cfg *Func) const; |
| 1250 | 1246 |
| 1251 } // end of namespace Ice | 1247 } // end of namespace Ice |
| 1252 | 1248 |
| 1253 #endif // SUBZERO_SRC_ICEINSTX8632_H | 1249 #endif // SUBZERO_SRC_ICEINSTX8632_H |
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