OLD | NEW |
1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/v8.h" | 5 #include "src/v8.h" |
6 | 6 |
7 #if V8_TARGET_ARCH_X64 | 7 #if V8_TARGET_ARCH_X64 |
8 | 8 |
9 #include "src/base/bits.h" | 9 #include "src/base/bits.h" |
10 #include "src/macro-assembler.h" | 10 #include "src/macro-assembler.h" |
(...skipping 144 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
155 bool has_sib = ((modrm & 0x07) == 0x04); | 155 bool has_sib = ((modrm & 0x07) == 0x04); |
156 byte mode = modrm & 0xC0; | 156 byte mode = modrm & 0xC0; |
157 int disp_offset = has_sib ? 2 : 1; | 157 int disp_offset = has_sib ? 2 : 1; |
158 int base_reg = (has_sib ? operand.buf_[1] : modrm) & 0x07; | 158 int base_reg = (has_sib ? operand.buf_[1] : modrm) & 0x07; |
159 // Mode 0 with rbp/r13 as ModR/M or SIB base register always has a 32-bit | 159 // Mode 0 with rbp/r13 as ModR/M or SIB base register always has a 32-bit |
160 // displacement. | 160 // displacement. |
161 bool is_baseless = (mode == 0) && (base_reg == 0x05); // No base or RIP base. | 161 bool is_baseless = (mode == 0) && (base_reg == 0x05); // No base or RIP base. |
162 int32_t disp_value = 0; | 162 int32_t disp_value = 0; |
163 if (mode == 0x80 || is_baseless) { | 163 if (mode == 0x80 || is_baseless) { |
164 // Mode 2 or mode 0 with rbp/r13 as base: Word displacement. | 164 // Mode 2 or mode 0 with rbp/r13 as base: Word displacement. |
165 disp_value = *BitCast<const int32_t*>(&operand.buf_[disp_offset]); | 165 disp_value = *bit_cast<const int32_t*>(&operand.buf_[disp_offset]); |
166 } else if (mode == 0x40) { | 166 } else if (mode == 0x40) { |
167 // Mode 1: Byte displacement. | 167 // Mode 1: Byte displacement. |
168 disp_value = static_cast<signed char>(operand.buf_[disp_offset]); | 168 disp_value = static_cast<signed char>(operand.buf_[disp_offset]); |
169 } | 169 } |
170 | 170 |
171 // Write new operand with same registers, but with modified displacement. | 171 // Write new operand with same registers, but with modified displacement. |
172 DCHECK(offset >= 0 ? disp_value + offset > disp_value | 172 DCHECK(offset >= 0 ? disp_value + offset > disp_value |
173 : disp_value + offset < disp_value); // No overflow. | 173 : disp_value + offset < disp_value); // No overflow. |
174 disp_value += offset; | 174 disp_value += offset; |
175 rex_ = operand.rex_; | 175 rex_ = operand.rex_; |
(...skipping 2811 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
2987 | 2987 |
2988 | 2988 |
2989 bool RelocInfo::IsInConstantPool() { | 2989 bool RelocInfo::IsInConstantPool() { |
2990 return false; | 2990 return false; |
2991 } | 2991 } |
2992 | 2992 |
2993 | 2993 |
2994 } } // namespace v8::internal | 2994 } } // namespace v8::internal |
2995 | 2995 |
2996 #endif // V8_TARGET_ARCH_X64 | 2996 #endif // V8_TARGET_ARCH_X64 |
OLD | NEW |