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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include <limits.h> | 5 #include <limits.h> |
6 #include <stdarg.h> | 6 #include <stdarg.h> |
7 #include <stdlib.h> | 7 #include <stdlib.h> |
8 #include <cmath> | 8 #include <cmath> |
9 | 9 |
10 #include "src/v8.h" | 10 #include "src/v8.h" |
11 | 11 |
12 #if V8_TARGET_ARCH_MIPS64 | 12 #if V8_TARGET_ARCH_MIPS64 |
13 | 13 |
14 #include "src/assembler.h" | 14 #include "src/assembler.h" |
15 #include "src/base/bits.h" | 15 #include "src/base/bits.h" |
16 #include "src/disasm.h" | 16 #include "src/disasm.h" |
17 #include "src/globals.h" // Need the BitCast. | |
18 #include "src/mips64/constants-mips64.h" | 17 #include "src/mips64/constants-mips64.h" |
19 #include "src/mips64/simulator-mips64.h" | 18 #include "src/mips64/simulator-mips64.h" |
20 #include "src/ostreams.h" | 19 #include "src/ostreams.h" |
21 | 20 |
22 // Only build the simulator if not compiling for real MIPS hardware. | 21 // Only build the simulator if not compiling for real MIPS hardware. |
23 #if defined(USE_SIMULATOR) | 22 #if defined(USE_SIMULATOR) |
24 | 23 |
25 namespace v8 { | 24 namespace v8 { |
26 namespace internal { | 25 namespace internal { |
27 | 26 |
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1050 // Set ONLY upper 32-bits, leaving lower bits untouched. | 1049 // Set ONLY upper 32-bits, leaving lower bits untouched. |
1051 // TODO(plind): big endian issue. | 1050 // TODO(plind): big endian issue. |
1052 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters)); | 1051 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters)); |
1053 int32_t *phiword = (reinterpret_cast<int32_t*>(&FPUregisters_[fpureg])) + 1; | 1052 int32_t *phiword = (reinterpret_cast<int32_t*>(&FPUregisters_[fpureg])) + 1; |
1054 *phiword = value; | 1053 *phiword = value; |
1055 } | 1054 } |
1056 | 1055 |
1057 | 1056 |
1058 void Simulator::set_fpu_register_float(int fpureg, float value) { | 1057 void Simulator::set_fpu_register_float(int fpureg, float value) { |
1059 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters)); | 1058 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters)); |
1060 *BitCast<float*>(&FPUregisters_[fpureg]) = value; | 1059 *bit_cast<float*>(&FPUregisters_[fpureg]) = value; |
1061 } | 1060 } |
1062 | 1061 |
1063 | 1062 |
1064 void Simulator::set_fpu_register_double(int fpureg, double value) { | 1063 void Simulator::set_fpu_register_double(int fpureg, double value) { |
1065 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters)); | 1064 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters)); |
1066 *BitCast<double*>(&FPUregisters_[fpureg]) = value; | 1065 *bit_cast<double*>(&FPUregisters_[fpureg]) = value; |
1067 } | 1066 } |
1068 | 1067 |
1069 | 1068 |
1070 // Get the register from the architecture state. This function does handle | 1069 // Get the register from the architecture state. This function does handle |
1071 // the special case of accessing the PC register. | 1070 // the special case of accessing the PC register. |
1072 int64_t Simulator::get_register(int reg) const { | 1071 int64_t Simulator::get_register(int reg) const { |
1073 DCHECK((reg >= 0) && (reg < kNumSimuRegisters)); | 1072 DCHECK((reg >= 0) && (reg < kNumSimuRegisters)); |
1074 if (reg == 0) | 1073 if (reg == 0) |
1075 return 0; | 1074 return 0; |
1076 else | 1075 else |
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1111 | 1110 |
1112 | 1111 |
1113 uint32_t Simulator::get_fpu_register_hi_word(int fpureg) const { | 1112 uint32_t Simulator::get_fpu_register_hi_word(int fpureg) const { |
1114 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters)); | 1113 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters)); |
1115 return static_cast<uint32_t>((FPUregisters_[fpureg] >> 32) & 0xffffffff); | 1114 return static_cast<uint32_t>((FPUregisters_[fpureg] >> 32) & 0xffffffff); |
1116 } | 1115 } |
1117 | 1116 |
1118 | 1117 |
1119 float Simulator::get_fpu_register_float(int fpureg) const { | 1118 float Simulator::get_fpu_register_float(int fpureg) const { |
1120 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters)); | 1119 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters)); |
1121 return *BitCast<float*>( | 1120 return *bit_cast<float*>(const_cast<int64_t*>(&FPUregisters_[fpureg])); |
1122 const_cast<int64_t*>(&FPUregisters_[fpureg])); | |
1123 } | 1121 } |
1124 | 1122 |
1125 | 1123 |
1126 double Simulator::get_fpu_register_double(int fpureg) const { | 1124 double Simulator::get_fpu_register_double(int fpureg) const { |
1127 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters)); | 1125 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters)); |
1128 return *BitCast<double*>(&FPUregisters_[fpureg]); | 1126 return *bit_cast<double*>(&FPUregisters_[fpureg]); |
1129 } | 1127 } |
1130 | 1128 |
1131 | 1129 |
1132 // Runtime FP routines take up to two double arguments and zero | 1130 // Runtime FP routines take up to two double arguments and zero |
1133 // or one integer arguments. All are constructed here, | 1131 // or one integer arguments. All are constructed here, |
1134 // from a0-a3 or f12 and f13 (n64), or f14 (O32). | 1132 // from a0-a3 or f12 and f13 (n64), or f14 (O32). |
1135 void Simulator::GetFpArgs(double* x, double* y, int32_t* z) { | 1133 void Simulator::GetFpArgs(double* x, double* y, int32_t* z) { |
1136 if (!IsMipsSoftFloatABI) { | 1134 if (!IsMipsSoftFloatABI) { |
1137 const int fparg2 = (kMipsAbi == kN64) ? 13 : 14; | 1135 const int fparg2 = (kMipsAbi == kN64) ? 13 : 14; |
1138 *x = get_fpu_register_double(12); | 1136 *x = get_fpu_register_double(12); |
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3439 } | 3437 } |
3440 | 3438 |
3441 | 3439 |
3442 #undef UNSUPPORTED | 3440 #undef UNSUPPORTED |
3443 | 3441 |
3444 } } // namespace v8::internal | 3442 } } // namespace v8::internal |
3445 | 3443 |
3446 #endif // USE_SIMULATOR | 3444 #endif // USE_SIMULATOR |
3447 | 3445 |
3448 #endif // V8_TARGET_ARCH_MIPS64 | 3446 #endif // V8_TARGET_ARCH_MIPS64 |
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