[turbofan] Fix the node matchers.

src/compiler/x64/instruction-selector-x64.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/instruction-selector-impl.h"
 #include "src/compiler/node-matchers.h"
 
 namespace v8 {
 namespace internal {
 namespace compiler {
@@ skipping 27 matching lines @@
 
   bool CanBeImmediate64(Node* node) {
     switch (node->opcode()) {
       case IrOpcode::kInt32Constant:
         return true;
       case IrOpcode::kNumberConstant:
         return true;
       case IrOpcode::kHeapConstant: {
         // Constants in new space cannot be used as immediates in V8 because
         // the GC does not scan code objects when collecting the new generation.
-        Handle<HeapObject> value = ValueOf<Handle<HeapObject> >(node->op());
-        return !isolate()->heap()->InNewSpace(*value);
+        Unique<HeapObject> value = OpParameter<Unique<HeapObject> >(node);
+        return !isolate()->heap()->InNewSpace(*value.handle());
       }
       default:
         return false;
     }
   }
 };
 
 
 void InstructionSelector::VisitLoad(Node* node) {
   MachineType rep = RepresentationOf(OpParameter<MachineType>(node));
@@ skipping 176 matching lines @@
 void InstructionSelector::VisitWord32Or(Node* node) {
   VisitBinop(this, node, kX64Or32);
 }
 
 
 void InstructionSelector::VisitWord64Or(Node* node) {
   VisitBinop(this, node, kX64Or);
 }
 
 
-template <typename T>
-static void VisitXor(InstructionSelector* selector, Node* node,
-                     ArchOpcode xor_opcode, ArchOpcode not_opcode) {
-  X64OperandGenerator g(selector);
-  BinopMatcher<IntMatcher<T>, IntMatcher<T> > m(node);
+void InstructionSelector::VisitWord32Xor(Node* node) {
+  X64OperandGenerator g(this);
+  Uint32BinopMatcher m(node);
   if (m.right().Is(-1)) {
-    selector->Emit(not_opcode, g.DefineSameAsFirst(node),
-                   g.Use(m.left().node()));
+    Emit(kX64Not32, g.DefineSameAsFirst(node), g.Use(m.left().node()));
   } else {
-    VisitBinop(selector, node, xor_opcode);
+    VisitBinop(this, node, kX64Xor32);
   }
 }
 
 
-void InstructionSelector::VisitWord32Xor(Node* node) {
-  VisitXor<int32_t>(this, node, kX64Xor32, kX64Not32);
+void InstructionSelector::VisitWord64Xor(Node* node) {
+  X64OperandGenerator g(this);
+  Uint64BinopMatcher m(node);
+  if (m.right().Is(-1)) {
+    Emit(kX64Not, g.DefineSameAsFirst(node), g.Use(m.left().node()));
+  } else {
+    VisitBinop(this, node, kX64Xor);
+  }
 }
 
 
-void InstructionSelector::VisitWord64Xor(Node* node) {
-  VisitXor<int64_t>(this, node, kX64Xor, kX64Not);
-}
-
-
 // Shared routine for multiple 32-bit shift operations.
 // TODO(bmeurer): Merge this with VisitWord64Shift using template magic?
 static void VisitWord32Shift(InstructionSelector* selector, Node* node,
                              ArchOpcode opcode) {
   X64OperandGenerator g(selector);
   Node* left = node->InputAt(0);
   Node* right = node->InputAt(1);
 
   // TODO(turbofan): assembler only supports some addressing modes for shifts.
   if (g.CanBeImmediate(right)) {
@@ skipping 82 matching lines @@
 void InstructionSelector::VisitInt32Add(Node* node) {
   VisitBinop(this, node, kX64Add32);
 }
 
 
 void InstructionSelector::VisitInt64Add(Node* node) {
   VisitBinop(this, node, kX64Add);
 }
 
 
-template <typename T>
-static void VisitSub(InstructionSelector* selector, Node* node,
-                     ArchOpcode sub_opcode, ArchOpcode neg_opcode) {
-  X64OperandGenerator g(selector);
-  BinopMatcher<IntMatcher<T>, IntMatcher<T> > m(node);
+void InstructionSelector::VisitInt32Sub(Node* node) {
+  X64OperandGenerator g(this);
+  Int32BinopMatcher m(node);
   if (m.left().Is(0)) {
-    selector->Emit(neg_opcode, g.DefineSameAsFirst(node),
-                   g.Use(m.right().node()));
+    Emit(kX64Neg32, g.DefineSameAsFirst(node), g.Use(m.right().node()));
   } else {
-    VisitBinop(selector, node, sub_opcode);
+    VisitBinop(this, node, kX64Sub32);
   }
 }
 
 
-void InstructionSelector::VisitInt32Sub(Node* node) {
-  VisitSub<int32_t>(this, node, kX64Sub32, kX64Neg32);
+void InstructionSelector::VisitInt64Sub(Node* node) {
+  X64OperandGenerator g(this);
+  Int64BinopMatcher m(node);
+  if (m.left().Is(0)) {
+    Emit(kX64Neg, g.DefineSameAsFirst(node), g.Use(m.right().node()));
+  } else {
+    VisitBinop(this, node, kX64Sub);
+  }
 }
 
 
-void InstructionSelector::VisitInt64Sub(Node* node) {
-  VisitSub<int64_t>(this, node, kX64Sub, kX64Neg);
-}
-
-
 static void VisitMul(InstructionSelector* selector, Node* node,
                      ArchOpcode opcode) {
   X64OperandGenerator g(selector);
   Node* left = node->InputAt(0);
   Node* right = node->InputAt(1);
   if (g.CanBeImmediate(right)) {
     selector->Emit(opcode, g.DefineAsRegister(node), g.Use(left),
                    g.UseImmediate(right));
   } else if (g.CanBeImmediate(left)) {
     selector->Emit(opcode, g.DefineAsRegister(node), g.Use(right),
@@ skipping 320 matching lines @@
     DCHECK(deoptimization == NULL && continuation == NULL);
     Emit(kArchDrop |
              MiscField::encode(static_cast<int>(buffer.pushed_nodes.size())),
          NULL);
   }
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8